Semiconductor device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-2023276627-A1
Application number	US-202217901606-A
Country	US
Kind code	A1
Filing date	Sep 1, 2022
Priority date	Feb 25, 2022
Publication date	Aug 31, 2023
Grant date	—

Abstract

A semiconductor device according to the present embodiment comprises a stack including a plurality of electrode films stacked in a first direction to be separated from each other. A column portion extends in the stack in the first direction and includes a semiconductor layer, and has memory cells at respective intersections of the semiconductor layer and the electrode films. A dividing portion extends in the stack in the first direction and a second direction crossing the first direction, divides the electrode films in a third direction crossing the first direction and the second direction, and includes an insulator. A first film is provided between the insulator and an end surface in the third direction of each of the electrode films and contains a first metal and silicon.

First claim

1 . A semiconductor device comprising:
a stack including a plurality of electrode films stacked in a first direction to be separated from each other; a column portion extending in the stack in the first direction, including a semiconductor layer, and having memory cells at respective intersections of the semiconductor layer and the electrode films; a dividing portion extending in the stack in the first direction and a second direction crossing the first direction, dividing the electrode films in a third direction crossing the first direction and the second direction, and including an insulator; and a first film provided between the insulator and an end surface in the third direction of each of the electrode films and containing a first metal and silicon.

2 . The device of claim 1 , wherein the first film is provided on an opposed surface of the electrode film which is opposed to the dividing portion.

3 . The device of claim 1 , wherein the first film covers a side surface of the electrode film on a side of the dividing portion.

4 . The device of claim 1 , wherein any of molybdenum silicide, tungsten silicide, titanium silicide, ruthenium silicide, cobalt silicide, and nickel silicide is used for the first film.

5 . The device of claim 1 , further comprising a second film provided on an inner wall of a cavity portion within the electrode film and containing a second metal and silicon.

6 . The device of claim 5 , wherein the second film is provided on an inner wall of a void or a seam within the electrode film.

7 . The device of claim 5 , wherein the second film is filled in a void or a seam within the electrode film.

8 . The device of claim 5 , wherein any of molybdenum silicide, tungsten silicide, titanium silicide, ruthenium silicide, cobalt silicide, and nickel silicide is used for the second film.

9 . The device of claim 5 , wherein materials different from each other are used for the first and second films.

10 . The device of claim 5 , further comprising a material film provided within the second film in the cavity portion.

11 . A manufacturing method of a semiconductor device, comprising:
forming a stack by alternately stacking a plurality of first insulation films and a plurality of first sacrifice films in a first direction; forming a plurality of column portions extending in the stack in the first direction, each containing a semiconductor layer, and each having memory cells at respective intersections of the semiconductor layer and a plurality of electrode films; forming a slit penetrating through the stack in the first direction; replacing the first sacrifice films with the electrode films via the slit; forming a first film containing a first metal and silicon on a side surface of each of the electrode films, the side surface being exposed to the slit; and forming a second insulation film on an inner wall of the slit.

12 . The method of claim 11 , wherein any of molybdenum silicide, tungsten silicide, titanium silicide, ruthenium silicide, cobalt silicide, and nickel silicide is used for the first film.

13 . The method of claim 11 , further comprising forming a second film containing a second metal and silicon on an inner wall of a cavity portion within the electrode film.

14 . The method of claim 13 , wherein the second film is formed on an inner wall of a void or a seam within the electrode film.

15 . The method of claim 13 , wherein the second film is filled in a void or a seam within the electrode film.

16 . The method of claim 13 , wherein any of molybdenum silicide, tungsten silicide, titanium silicide, ruthenium silicide, cobalt silicide, and nickel silicide is used for the second film.

17 . The method of claim 13 , wherein materials different from each other are used for the first and second films.

18 . The method of claim 13 , further including forming a material film within the second film in the cavity portion.

Assignees

• Kioxia Corp

Inventors

• Fukushima Takashi
• Katou Kaihei
• Toratani Kenichiro
• Fujitsuka Ryota
• Fujita Junya
• Fukumoto Atsushi
• Fujii Motoki
• Wakisaka Yuki
• Hatano Kazuya

Classifications

• H10D64/037

  comprising charge-trapping insulators · CPC title

• H10B43/27 Primary

  the channels comprising vertical portions, e.g. U-shaped channels · CPC title

• H10B43/10

  characterised by the top-view layout · CPC title

• H01L27/11582 Primary

  Electricity · mapped topic