Semiconductor memory device and method for manufacturing same

Patent metadata

Field	Value
Publication number	US-2018226422-A1
Application number	US-201715461598-A
Country	US
Kind code	A1
Filing date	Mar 17, 2017
Priority date	Feb 7, 2017
Publication date	Aug 9, 2018
Grant date	—

Abstract

A semiconductor memory device according to an embodiment includes a stacked body in which an electrode film and an insulating film are alternately stacked along a first direction, a semiconductor member extending in the first direction and piercing the stacked body, and a charge storage member provided between the semiconductor member and the electrode film. The electrode film includes a first portion. The first portion is composed of a metal silicide. The first portion surrounds the semiconductor member as viewed from the first direction.

First claim

1 . A semiconductor memory device, comprising:
a stacked body in which an electrode film and an insulating film are alternately stacked along a first direction; a semiconductor member extending in the first direction and piercing the stacked body; and a charge storage member provided between the semiconductor member and the electrode film, the electrode film including a first portion and a second portion, the first portion surrounding the semiconductor member as viewed from the first direction, the first portion being provided between the semiconductor member and the second portion, the second portion having a first material selected from silicon, germanium, or carbon, the second portion not having a metal silicide, the first portion having a metal silicide including the first material.

2 . (canceled)

3 . The device according to claim 1 , wherein the second portion surrounds the first portion.

4 . The device according to claim 1 , wherein the second portion contains an impurity to serve as a donor.

5 . The device according to claim 1 , wherein the second portion contains an impurity to server as an acceptor.

6 . The device according to claim 1 , wherein
a length in a second portion direction crossing the first direction of the electrode film is longer than a length in the first direction of the electrode film and a length in a third direction intersecting a plane including the first direction and the second direction of the electrode film, and at least a part of the second portion is disposed in both end portions in the third direction of the electrode film.

7 . The device according to claim 1 , wherein the first portion surrounds a plurality of the semiconductor members as viewed from the first direction.

8 . The device according to claim 1 , wherein the metal silicide contains silicon and one or more metals selected from the group consisting of titanium, nickel, cobalt, tungsten, and platinum.

9 . The device according to claim 1 , wherein a cross section including a central axis of the semiconductor member, a surface facing the semiconductor member of the first portion is curved so as to be convex toward the semiconductor member.

10 . The device according to claim 1 , wherein in a cross section including a central axis of the semiconductor member, a concave portion is formed on a surface facing the semiconductor member of the first portion.

11 . The device according to claim 1 , wherein the charge storage member has electrical conductivity, and is divided for each electrode film in the first direction.

12 . The device according to claim 1 , wherein the charge storage member contains silicon.

13 . The device according to claim 1 , further comprising: a first insulating film provided between the first portion and the charge storage member, wherein
the first insulating film includes
a first layer containing silicon oxide,
a second layer containing silicon nitride, and
a third layer containing silicon oxide, and
the second layer is disposed between the first layer and the third layer.

14 . The device according to claim 1 , further comprising: a second insulating film containing silicon oxide, and provided between the charge storage member and the semiconductor member.

15 . A method for manufacturing a semiconductor memory device, comprising:
forming a stacked body by alternately stacking a silicon film and an insulating film along a first direction; forming a hole extending in the first direction in the stacked body; forming a metal film on an inner surface of the hole; converting a part of the silicon film to a first portion composed of a metal silicide by reacting silicon in the silicon film and a metal element in the metal film with each other; forming a charge storage member on an inner surface of the hole; and forming a semiconductor member in the hole.

16 . The method according to claim 15 , further comprising:
forming a concave portion on an inner surface of the hole by removing a part of the silicon film through the hole; and removing a portion disposed in the hole in the charge storage member so as to leave a portion disposed in the concave portion.

17 . The method according to claim 15 , wherein the conversion to the first portion includes performing a heat treatment.

18 . The method according to claim 15 , wherein
in the forming the hole, a plurality of the holes is formed in the stacked body, and in the conversion to the first portion, the first portions formed using the adjacent holes as starting points are brought into contact with each other.

19 . The method according to claim 15 , further comprising
removing an unreacted portion of the metal film after the conversion to the first portion.

20 . The method according to claim 15 , wherein the metal film contains one or more metals selected from the group consisting of titanium, nickel, cobalt, tungsten, and platinum.

Assignees

• Toshiba Memory Corp

Inventors

• Sonehara Takeshi

Classifications

• H01L27/11556 Primary

  Electricity · mapped topic

• H01L27/11524

  Electricity · mapped topic

• H01L27/11519

  Electricity · mapped topic

• H10B41/35

  with a cell select transistor, e.g. NAND · CPC title

• H10B41/10 Primary

  characterised by the top-view layout · CPC title