Vertical type semiconductor devices and methods of manufacturing the same

US2019164989A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2019164989-A1
Application numberUS-201816122037-A
CountryUS
Kind codeA1
Filing dateSep 5, 2018
Priority dateNov 27, 2017
Publication dateMay 30, 2019
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A vertical type semiconductor device includes insulation patterns on a substrate and spaced apart from each other in a first direction perpendicular to a top surface of the substrate, a channel structure on the substrate and penetrating through the insulation patterns, a first conductive pattern partially filling a gap between the insulation patterns adjacent to each other in the first direction and the channel structure and having a slit in a surface thereof, the slit extending in a direction parallel with the top surface of the substrate, and a second conductive pattern on the first conductive pattern in the gap and filling the slit.

First claim

Opening claim text (preview).

What is claimed is: 1 . A vertical type semiconductor device, comprising: insulation patterns on a substrate and spaced apart from each other in a first direction perpendicular to a top surface of the substrate; a channel structure on the substrate and penetrating through the insulation patterns; a first conductive pattern partially filling a gap between the insulation patterns adjacent to each other in the first direction and the channel structure and having a slit in a surface thereof, the slit extending in a direction parallel with the top surface of the substrate; and a second conductive pattern on the first conductive pattern in the gap and filling the slit. 2 . The vertical type semiconductor device of claim 1 , wherein the first conductive pattern comprises a metal material. 3 . The vertical type semiconductor device of claim 1 , wherein the first conductive pattern comprises tungsten. 4 . The vertical type semiconductor device of claim 1 , wherein the second conductive pattern comprises titanium, titanium nitride, tantalum or tantalum nitride. 5 . The vertical type semiconductor device of claim 1 , further comprising a barrier pattern surrounding a top surface, a sidewall and a bottom surface of the first conductive pattern. 6 . The vertical type semiconductor device of claim 1 , wherein the gap is defined as a space between surfaces of the above and underlying insulation patterns adjacent to each other in the direction and the channel structure, the first conductive pattern is along a top surface of the underlying insulation pattern, the channel structure and a bottom surface of the above insulation pattern, and the slit is between the first conductive patterns on the top surface of the underlying insulation pattern and the bottom surface of the above insulation pattern. 7 . The vertical type semiconductor device of claim 1 , wherein the slit is in a middle region of the gap in the first direction. 8 . The vertical type semiconductor device of claim 1 , wherein a gate structure including the first and second conductive patterns extends in a second direction parallel with the top surface of the substrate. 9 . The vertical type semiconductor device of claim 8 , wherein a plurality of the gate structures is arranged in a third direction perpendicular to the second direction and parallel with the top surface of the substrate, and a trench extends in the second direction between the gate structures and exposes the substrate. 10 . The vertical type semiconductor device of claim 9 , wherein an entrance of the slit adjacent to the trench is opened toward the trench. 11 . The vertical type semiconductor device of claim 10 , wherein the entrance of the slit has a width in the first direction less than other portions of the slit. 12 . The vertical type semiconductor device of claim 9 , further comprising: an insulation spacer on a sidewall of the trench to cover the first conductive pattern; and a common source line on the insulation spacer to fill the trench. 13 . The vertical type semiconductor device of claim 1 , wherein the first conductive pattern has a shape surrounding the channel structure when a middle region in the first direction of the gate structure is viewed in a plan view taken along a direction parallel with the top surface of the semiconductor substrate. 14 . The vertical type semiconductor device of claim 1 , further comprising a semiconductor pattern between the substrate and the channel structure. 15 . A vertical type semiconductor device, comprising: insulation patterns on a substrate and spaced apart from each other in a first direction perpendicular to a top surface of the substrate, the insulation pattern extending a second direction parallel to the top surface of the substrate; channel structures on the substrate, each channel structure penetrating through the insulation patterns; and a gate structure in a gap between the insulation patterns adjacent to each other in the first direction and the channel structure, the gate structure extending in the second direction, the gate structure comprising: a first conductive pattern along a top surface and a bottom surface of the insulation patterns and the channel structure and having a slit in a surface thereof; and a second conductive pattern on the first conductive pattern to fill the slit and including a material different from the first conductive pattern. 16 . The vertical type semiconductor device of claim 15 , wherein a plurality of the gate structures is arranged in a third direction perpendicular to the second direction and parallel with the top surface of the substrate, and a trench extends in the second direction between the gate structures and exposes the substrate. 17 . The vertical type semiconductor device of claim 15 , wherein an entrance of the slit adjacent to the trench is opened toward the trench. 18 . A vertical type semiconductor device, comprising: pattern structures including gate structures and insulation patterns alternately and repeatedly stacked on a substrate in a first direction perpendicular to a top surface of the substrate; channel structures penetrating through the insulation patterns; and a common source line between the pattern structures, extending in a second direction parallel with the top surface of the substrate and contacting the substrate, the gate structure comprising: a first conductive pattern having a slit extending in a direction parallel with the top surface of the substrate; and a second conductive pattern on the first conductive pattern filling the slit. 19 . The vertical type semiconductor device of claim 18 , wherein the first conductive pattern comprises tungsten, and the second conductive pattern comprises titanium, titanium nitride, tantalum or tantalum nitride. 20 . The vertical type semiconductor device of claim 18 , wherein an entrance of the slit is opened toward the common source line.

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2019164989A1 cover?
A vertical type semiconductor device includes insulation patterns on a substrate and spaced apart from each other in a first direction perpendicular to a top surface of the substrate, a channel structure on the substrate and penetrating through the insulation patterns, a first conductive pattern partially filling a gap between the insulation patterns adjacent to each other in the first directio…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L27/11582. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu May 30 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).