Semiconductor device and manufacturing method of the same

Patent metadata

Field	Value
Publication number	US-2021134879-A1
Application number	US-202016905074-A
Country	US
Kind code	A1
Filing date	Jun 18, 2020
Priority date	Oct 31, 2019
Publication date	May 6, 2021
Grant date	—

Abstract

A semiconductor device is provided. The semiconductor device includes a substrate having a chamber. The semiconductor device also includes a first dielectric layer disposed on the substrate. The semiconductor device further includes a pair of thermocouples disposed on the first dielectric layer. The semiconductor device includes a second dielectric layer disposed on the first dielectric layer and between the thermocouples. The semiconductor device also includes an absorber connected to the thermocouples.

First claim

What is claimed is:

1 . A semiconductor device, comprising:
a substrate having a chamber; a first dielectric layer disposed on the substrate; a pair of thermocouples disposed on the first dielectric layer; an isolation structure disposed between the thermocouples; and an absorber connected to the thermocouples.

2 . The semiconductor device as claimed in claim 1 , wherein a material of the thermocouples comprises an N-type semiconductor and a P-type semiconductor.

3 . The semiconductor device as claimed in claim 2 , further comprising:
a second dielectric layer disposed on the first dielectric layer and the thermocouples, wherein the second dielectric layer has at least two recesses, and a portion of the absorber is disposed in the recesses.

4 . The semiconductor device as claimed in claim 3 , further comprising:
a third dielectric layer disposed on the second dielectric layer.

5 . The semiconductor device as claimed in claim 4 , wherein the third dielectric layer fills the recesses.

6 . The semiconductor device as claimed in claim 3 , wherein the absorber comprises:
a connecting layer disposed in the recesses; and a heat-absorbing layer disposed on the connecting layer and the second dielectric layer.

7 . The semiconductor device as claimed in claim 6 , wherein a material of the connecting layer comprises titanium nitride, and a material of the heat-absorbing layer comprises titanium nitride.

8 . A semiconductor device, comprising:
a substrate having a chamber; a first dielectric layer disposed on the substrate; a pair of thermocouples disposed on the first dielectric layer; a second dielectric layer disposed on the first dielectric layer and between the thermocouples; and an absorber connected to the thermocouples.

9 . The semiconductor device as claimed in claim 8 , wherein a portion of the second dielectric layer disposed between the thermocouples is used as an isolation structure.

10 . The semiconductor device as claimed in claim 9 , wherein the material of the thermocouples comprises an N-type semiconductor and a P-type semiconductor.

11 . The semiconductor device as claimed in claim 9 , wherein the second dielectric layer has at least two recesses, the recesses are respectively disposed on two sides of the isolation structure, and a portion of the absorber is disposed in the recesses.

12 . The semiconductor device as claimed in claim 11 , further comprising:
a third dielectric layer disposed on the second dielectric layer.

13 . The semiconductor device as claimed in claim 12 , wherein the third dielectric layer fills the recesses.

14 . The semiconductor device as claimed in claim 11 , wherein the absorber comprises:
a connecting layer disposed in the recesses; and a heat-absorbing layer disposed on the connecting layer and the second dielectric layer.

15 . A manufacturing method of a semiconductor device, comprising:
providing a substrate; forming a recess in the substrate; forming a filling structure to fill the recess; forming a first dielectric on the filling structure; forming a conductive structure on the first dielectric layer; patterning the conductive structure to form a pair of thermocouples; forming a second dielectric layer on the first dielectric layer and between the thermocouples; forming an absorber to connect to the pair of thermocouples; and removing the filling structure to form a chamber.

16 . The manufacturing method of the semiconductor device as claimed in claim 15 , further comprising:
performing ion implantation after patterning the conductive structure to form the pair of thermocouples.

17 . The manufacturing method of the semiconductor device as claimed in claim 15 ,
patterning the second dielectric layer to form at least two recesses, wherein the recesses expose a portion of top surfaces of the thermocouples.

18 . The manufacturing method of the semiconductor device as claimed in claim 17 , wherein a portion of the absorber is disposed in the recesses.

19 . The manufacturing method of the semiconductor device as claimed in claim 15 , further comprising:
forming a third dielectric layer on the second dielectric layer.

Assignees

• Nuvoton Technology Corp

Inventors

• Chiu In-Shiang
• Chen Kuang-Chu
• Hsiao Peng-Chan
• Liu han-ying

Classifications

• H01L27/16 Primary

  Electricity · mapped topic

• H01L35/34

  Electricity · mapped topic

• H01L35/08

  Electricity · mapped topic

• H10N10/17 Primary

  characterised by the structure or configuration of the cell or thermocouple forming the device · CPC title

• H10N10/817

  the junction being non-separable, e.g. being cemented, sintered or soldered · CPC title