Dual wafer plating fixture for a continuous plating line

US2019301047A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2019301047-A1
Application numberUS-201916295995-A
CountryUS
Kind codeA1
Filing dateMar 7, 2019
Priority dateMar 30, 2018
Publication dateOct 3, 2019
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wafer plating fixture for use in simultaneously electroplating a two substrates. The wafer plating fixture including: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus and configured to hold the two substrates in place and electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer to separate the two substrates coupled to the carrier bus. A method of electroplating a plurality of substrates. The method including: mounting two substrates to be plated onto a wafer plating fixture; mounting the wafer plating fixture on a continuous belt of plating system; dipping the wafer plating fixture with the two substrates held thereon into an electroplating bath; and applying a voltage to the two substrates via the wafer plating fixture.

First claim

Opening claim text (preview).

What is claimed is: 1 . A wafer plating fixture for use in simultaneously electroplating two substrates, the wafer plating fixture comprising: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus, wherein the plurality of contact clips are distributed on either side of the carrier bus and configured to electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer coupled to the carrier bus and configured to separate the two substrates. 2 . The wafer plating fixture of claim 1 , wherein the electrically conductive carrier bus is configured to attach to an electrically conductive continuous plating belt. 3 . The wafer plating fixture of claim 1 , wherein the substrate backer comprises a top portion that extends along a bottom edge portion of the carrier bus and two or more distal extensions that extend from the top portion of the substrate backer, wherein the distal extensions are configured to keep the two substrates from contacting. 4 . The wafer plating fixture of claim 3 , wherein the substrate backer comprises two distal extensions. 5 . The wafer plating fixture of claim 3 , wherein the substrate backer comprises three distal extensions. 6 . The wafer plating fixture of claim 3 , wherein the two or more distal extensions are connected by cross bracing to provide rigidity. 7 . The wafer plating fixture of claim 3 , wherein the distal extensions are configured minimize contact with the two substrates. 8 . The wafer plating fixture of claim 7 , wherein the distal extensions are ovoid, round or diamond in cross section for at least a portion of their length to minimize contact with the two substrates. 9 . The wafer plating fixture of claim 7 , wherein the distal extensions comprise one or more protrusions along their length that are oriented to provide minimal contact with a tip of the protrusion and the substrates. 10 . The wafer plating fixture of claim 1 , wherein the substrate backer comprises landing sites for the plurality of contact clips when there is no substrate. 11 . The wafer plating fixture of claim 1 , wherein the plurality of contact clips are coupled to the carrier with a clamp bar on either side of the carrier bus. 12 . The wafer plating fixture of claim 1 , wherein the plurality of contact clips comprise three or more contact clips distributed on each side of the carrier bus. 13 . The wafer plating fixture of claim 1 , wherein each of the contact clips comprises a spring. 14 . The wafer plating fixture of claim 1 , wherein the carrier bus comprises a plurality of horizontally distributed opening configured for passage of a contact clamp. 15 . The wafer plating fixture of claim 14 , wherein the contact clamp comprises a single piece of metallic material that passes through one of the openings in the carrier bus. 16 . The wafer plating fixture of claim 1 , wherein the plurality of contact clips comprise pairs of contact clips, wherein the one of member of the pair of contacts clips is disposed on one side of the carrier bus and the other member of the pair of contact clips is disposed on an opposite side of the carrier bus. 17 . The wafer plating fixture of claim 1 , wherein each pair of contact clips comprises two non-reversing mirrored pins. 18 . A plating fixture for simultaneously electroplating two substrates, the plating fixture comprising: a carrier bus for distributing electrical current from a continuous belt of a plating system; means for electrically coupling two substrates to the carrier bus and for distributing electrical current to the two substrates; means for separating the two substrates while being electrically coupled to the carrier bus, wherein the means for separating the two substrates creates a rinsing space between the two substrates. 19 . The plating fixture of claim 1 , wherein the means for separating the two substrates comprises two or more distal extensions configured to keep the two substrates from contacting. 20 . A method of electroplating a plurality of substrates, the method comprising: mounting two substrates to be plated onto a wafer plating fixture, the wafer plating fixture comprising: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus, wherein the plurality of contact clips are distributed on either side of the carrier bus and configured to electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer coupled to the carrier bus and configured to separate the two substrates; mounting the wafer plating fixture on a continuous belt of plating system; dipping the wafer plating fixture with the two substrates held thereon into an electroplating bath; and applying a voltage to the two substrates via the wafer plating fixture.

Assignees

Inventors

Classifications

  • Contacting devices · CPC title

  • C25D17/08Primary

    Supporting} racks {, i.e. not for suspending · CPC title

  • Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells · CPC title

  • C25D17/06Primary

    Suspending or supporting devices for articles to be coated · CPC title

  • for solar cells · CPC title

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Frequently asked questions

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What does patent US2019301047A1 cover?
A wafer plating fixture for use in simultaneously electroplating a two substrates. The wafer plating fixture including: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus and configured to hold the two substrates in place and electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer to separate the …
Who is the assignee on this patent?
Sunpower Corp
What technology area does this patent fall under?
Primary CPC classification C25D17/08. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Thu Oct 03 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).