Radio signal processing device, semiconductor device, and oscillation frequency variation correction method

US2018367152A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018367152-A1
Application numberUS-201815950959-A
CountryUS
Kind codeA1
Filing dateApr 11, 2018
Priority dateJun 15, 2017
Publication dateDec 20, 2018
Grant date

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The variation of the oscillation frequency of an oscillator can be suppressed even in the case where the amount of interference with the oscillator accompanied by an amplifying operation of a power amplifier and the polarity are not constant. An oscillator is configured to be capable of oscillating at an oscillation frequency in accordance with control signals Vcont and FREQ_CTRL. A phase locked loop allows the oscillator to output an oscillation signal Vout in synchronization with a reference signal RELCLK using the control signal Vcont. A power amplifier amplifies the electric power of the oscillation signal Vout. A variation detection unit detects a variation with respect to the time change of the control signal Vcont after an amplifying operation is started by the power amplifier causing 3interference with the oscillator. A variation correction unit generates the control signal FREQ_CTRL on the basis of the variation detected by the variation detection unit, and corrects the variation of the oscillation frequency caused by the interference accompanied by the amplifying operation of the power amplifier.

First claim

Opening claim text (preview).

What is claimed is: 1 . A radio signal processing device comprising: an oscillator that has a resonance circuit including an inductor, a first capacity unit whose capacitance value can be changed in accordance with a first control signal, and a second capacity unit whose capacitance value can be changed in accordance with a second control signal, and that outputs an oscillation signal having an oscillation frequency in accordance with the resonance frequency of the resonance circuit; a phase locked loop that controls the oscillator by generating the first control signal to be output to the oscillator, and that allows the oscillator to output the oscillation signal in synchronization with a reference signal; a variation detection unit that detects a variation with respect to the time change of the first control signal after a power amplifier causing interference with the resonance circuit starts an amplifying operation, the power amplifier amplifying a radio transmission signal on the basis of the oscillation signal in a state where the phase locked loop controls the oscillation signal output by the oscillator at a predetermined frequency; and a variation correction unit that generates the second control signal on the basis of the variation detected by the variation detection unit, and that corrects the variation of the oscillation frequency caused by the interference accompanied by the amplifying operation of the power amplifier by outputting the generated second control signal to the oscillator. 2 . The radio signal processing device according to claim 1 , wherein the variation correction unit changes the oscillation frequency so as to cancel the variation of the oscillation frequency caused by the interference of the power amplifier using the second control signal. 3 . The radio signal processing device according to claim 1 , wherein the first control signal has an upper limit value and a lower limit value for controlling, and the variation correction unit performs the correction so that the first control signal output by the phase locked loop to the oscillator becomes lower than the upper limit value and higher than the lower limit value after the correction is performed. 4 . The radio signal processing device according to claim 1 , wherein the variation detection unit detects a first period of time from the reference timing related to the start of the amplifying operation in the power amplifier to the time the first control signal reaches a predetermined threshold value. 5 . The radio signal processing device according to claim 4 , wherein the variation detection unit detects a slope with respect to the time change of the first control signal on the basis of the time until the first control signal reaches the predetermined threshold value and the predetermined threshold value. 6 . The radio signal processing device according to claim 5 , wherein the power amplifier is controlled so that the amplification factor is increased in a plurality of stages until the electric power of the radio transmission signal becomes a predetermined electric power, and wherein the variation correction unit estimates the variation amount of the oscillation frequency caused by the interference of the power amplifier on the basis of the slope detected by the variation detection unit, a second period of time from the reference timing to the completion timing of an increase in the amplification factor, and the change amount of the oscillation frequency with respect to a change in the first control signal in the oscillator. 7 . The radio signal processing device according to claim 6 , wherein the variation correction unit generates the second control signal on the basis of the variation amount of the estimated oscillation frequency and the change amount of the oscillation frequency with respect to the change amount of the second control signal in the oscillator. 8 . The radio signal processing device according to claim 6 , wherein the variation correction unit changes a relationship between the first control signal and the oscillation frequency in the oscillator by only the variation amount of the estimated oscillation frequency by outputting the generated second control signal to the oscillator. 9 . The radio signal processing device according to claim 4 , wherein the variation correction unit further has a table in which a value related to the correction amount of the correction is stored while being associated with the first period of time, obtains the value related to the correction amount in association with the first period of time detected by the variation detection unit from the table, and generates the second control signal on the basis of the obtained value related to the correction amount. 10 . The radio signal processing device according to claim 1 , wherein the second control signal is encoded using a thermometer code. 11 . The radio signal processing device according to claim 1 , wherein the oscillator outputs the oscillation signal with the phase or frequency modulated in accordance with transmission data. 12 . The radio signal processing device according to claim 11 , wherein the variation detection unit detects the variation of the first control signal in a period before the oscillation signal is modulated by the transmission data. 13 . The radio signal processing device according to claim 11 , wherein the power amplifier amplifies the oscillation signal output by the oscillator. 14 . The radio signal processing device according to claim 11 , wherein the amplification factor of the power amplifier is controlled in accordance with the transmission data, and the amplitude of the radio transmission signal is further modulated in accordance with the transmission data. 15 . The radio signal processing device according to claim 1 , wherein the phase locked loop is configured using an analog phase locked loop, and outputs the first control signal that is an analog voltage signal to the oscillator, and wherein the oscillator is configured as a voltage controlled oscillator controlled in accordance with the first control signal. 16 . The radio signal processing device according to claim 1 , wherein the phase locked loop is configured as a digital phase locked loop, and outputs the first control signal that is a digital signal to the oscillator, and wherein the oscillator is configured as a digitally controlled oscillator controlled in accordance with the first control signal. 17 . The radio signal processing device according to claim 16 , wherein the variation detection unit monitors the first control signal, and detects the variation on the basis of the magnitude of a change in the first control signal in a predetermined period of time. 18 . The radio signal processing device according to claim 1 , wherein the resonance circuit further includes a fourth capacity unit whose capacitance value is changed in accordance with a fourth control signal, and the fourth control signal is adjusted so that the frequency of the oscillation signal becomes a predetermined frequency. 19 . A semiconductor device comprising: an oscillator that has a resonance circuit including an inductor, a first capacity unit whose capacitance value can be changed in accordance with a first control signal, and a second capacity unit whose capacitance value can be changed in accordance with a second control signal, and that outputs an oscillation signal having an oscillation frequency in accordance with the re

Assignees

Inventors

Classifications

  • All digital phase-locked loop · CPC title

  • a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division {(H03L7/1806 takes precedence)} · CPC title

  • H03L7/1806Primary

    the frequency divider comprising a phase accumulator generating the frequency divided signal · CPC title

  • by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth (H03L7/1072 takes precedence) · CPC title

  • H03B5/1228Primary

    the amplifier comprising one or more field effect transistors · CPC title

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What does patent US2018367152A1 cover?
The variation of the oscillation frequency of an oscillator can be suppressed even in the case where the amount of interference with the oscillator accompanied by an amplifying operation of a power amplifier and the polarity are not constant. An oscillator is configured to be capable of oscillating at an oscillation frequency in accordance with control signals Vcont and FREQ_CTRL. A phase locke…
Who is the assignee on this patent?
Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H03L7/1806. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 20 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).