Substrate with antireflection coating and method for producing same
US-11906700-B2 · Feb 20, 2024 · US
US2018330931A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2018330931-A1 |
| Application number | US-201615775827-A |
| Country | US |
| Kind code | A1 |
| Filing date | Nov 14, 2016 |
| Priority date | Nov 12, 2015 |
| Publication date | Nov 15, 2018 |
| Grant date | — |
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The present disclosure relates to a sputtering arrangement, a vacuum coating system, and a method for carrying out HiPIMS coating methods; the sputtering arrangement has at least two different interconnection possibilities and the switch to the second interconnection possibility, in which two sputtering sub-assemblies are operated simultaneously with high power pulses, achieves a productivity gain.
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1 - 8 . (canceled) 9 . A sputtering arrangement comprising: a number N of sputtering cathodes or sub-cathodes T i with i=1 to N, and a number n of sputtering power generators G j with it j=1 to n, wherein N is a whole number and N≥2 and n is also a whole number and n≥2; said sputtering arrangement further comprising bridge switches Sb j for switching the power output P j of the respective sputtering power generator G j , and pulse switch Sp i for distributing the respective power outputs P j to the respective sputtering cathodes T i ; said sputtering arrangement is assembled so that it can be operated in at least two different interconnection possibilities, and: in the first interconnection variant, the respective power outputs P j of the n sputtering power generators G j can be logically interconnected by means of the bridge switches so that a total sputtering power P is supplied, which corresponds to the sum of the power outputs P j , i.e. P=Σ j=1 n Pj, and through a pulse sequence generation by means of the respective pulse switches, a sequence of power pulses with pulse power P and sequence period T is produced; the individual power pulses are chronologically distributed to the respective sputtering cathodes T i ; the sputtering cathodes are respectively supplied with power during a pulse time t i ; and a period T corresponds to the sum of the pulse times, i.e. T=Σ i=1 N t i , and in the second interconnection variant, the sputtering cathodes are operated in at least two separate sputtering sub-arrangements A and B; in order to operate the sputtering sub-arrangements, the respective power outputs of a number nA of sputtering generators and a number nB of sputtering generators can be logically interconnected by means of the bridge switches so that a first pulse power P A ==Σ j=1 nA Pj and a second pulse power P B ==Σ j=nA n Pj are supplied, where nA+nB=n, and where through the respective generation of pulse sequence by means of the respective pulse switches, a respective first sequence of power pulses with a pulse power P A and a sequence period T A and second sequence of power pulses with a pulse power P B and a sequence period T B are produced; the individual power pulses are chronologically distributed to the sputtering cathodes of the respective sputtering sub-arrangements, where NA corresponds to the number of sputtering cathodes of the first sputtering sub-arrangement A and NB corresponds to the number of sputtering cathodes of the second sputtering sub-arrangement B and NA+NB=N, and the sequence period T A corresponds to the sum of the pulse times for the sputtering cathodes of the first sputtering sub-arrangement A and the sequence period T B corresponds to the sum of the pulse times for the sputtering cathodes of the second sputtering sub-arrangement B, i.e. T A ==Σ i=1 NA ti and T B =Σ i=NA N ti. 10 . A vacuum coating system with a sputtering arrangement according to claim 9 , wherein the sputtering arrangement is assembled in such a way that during the execution of a sputtering method, high power pulses can be used, which permit the use of high sputtering power densities of 100 W/cm 2 or greater, in particular 300 W/cm2 or greater. 11 . The vacuum coating system of claim 9 , wherein N=n. 12 . The vacuum coating system of claim 10 , wherein N=n. 13 . The vacuum coating system of claim 9 , wherein P A =P B . 14 . The vacuum coating system of claim 10 , wherein P A =P B . 15 . The vacuum coating system of claim 9 , wherein P=P A +P B . 16 . The vacuum coating system of claim 10 , wherein P=P A +P B . 17 . The vacuum coating system of claim 9 , wherein NA=NB and/or nA=nB. 18 . The vacuum coating system of claim 10 , wherein NA=NB and/or nA=nB 19 . A method for coating substrates by means of HiPIMS in which the HiPIMS method is carried out in a vacuum coating system of claim 9 . 20 . A method for coating substrates by means of HiPIMS in which the HiPIMS method is carried out in a vacuum coating system of claim 10 . 21 . The method according to claim 19 , wherein at least in order to deposit a layer by means of HiPIMS methods, the sputtering arrangement is switched to an interconnection variant with at least two sputtering sub-arrangements and a coating rate gain is achieved in comparison to a HiPIMS method, which is carried out with the sputtering arrangement in a first interconnection variant. 22 . The method according to claim 20 , wherein at least in order to deposit a layer by means of HiPIMS methods, the sputtering arrangement is switched to an interconnection variant with at least two sputtering sub-arrangements and a coating rate gain is achieved in comparison to a HiPIMS method, which is carried out with the sputtering arrangement in a first interconnection variant.
using pulsed power to the target · CPC title
Associated circuits · CPC title
Pulsed operation, e.g. HIPIMS · CPC title
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