Advanced process control methods for process-aware dimension targeting

US2018012813A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018012813-A1
Application numberUS-201615201771-A
CountryUS
Kind codeA1
Filing dateJul 5, 2016
Priority dateJul 5, 2016
Publication dateJan 11, 2018
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Disclosed are methods of advanced process control (APC) for particular processes. A particular process (e.g., a photolithography or etch process) is performed on a wafer to create a pattern of features. A parameter is measured on a target feature and the value of the parameter is used for APC. However, instead of performing APC based directly on the actual parameter value, APC is performed based on an adjusted parameter value. Specifically, an offset amount (which is previously determined based on an average of a distribution of parameter values across all of the features) is applied to the actual parameter value to acquire an adjusted parameter value, which better represents the majority of features in the pattern. Performing this APC method minimizes dimension variations from pattern to pattern each time the same pattern is generated on another region of the same wafer or on a different wafer using the particular process.

First claim

Opening claim text (preview).

1 . A method comprising: performing a process on a semiconductor wafer according to an initial set of process specifications, the process being performed to form a patterned region with a pattern of features; measuring a parameter of a target feature in the pattern to acquire a parameter value, the target feature being selected from amongst all the features in the pattern; accessing an offset database to acquire an offset amount that is associated in the offset database with the target feature; applying the offset amount to the parameter value to acquire an adjusted parameter value; based on a difference between the adjusted parameter value and a target parameter value for the features, adjusting at least one of the process specifications in the initial set of process specifications to generate an adjusted set of process specifications; and, repeating the process either on a different region of the semiconductor wafer or on a different semiconductor wafer according to the adjusted set of process specifications to form a second patterned region with the pattern of the features, wherein, during the repeating, the adjusted set of process specifications is used to minimize variations between the target parameter value and actual parameter values of features in the pattern of features in the second patterned region, and wherein the target parameter value is a design goal set to at least one of achieve optimal performance in integrated circuit structures being formed using the process and avoid fails in the integrated circuit structures being formed using the process. 2 . The method of claim 1 , wherein the parameter is a dimension, the parameter value is a measurement of the dimension, and the target parameter value is a design-specified value for the dimension. 3 . (canceled) 4 . The method of claim 1 , further comprising, before the performing of the process, developing the offset database, wherein the developing of the offset database comprises: performing the process on a test wafer according to the initial set of process specifications so as to form a test region with the pattern of features; measuring the parameter on each of the features in the test region to acquire test parameter values for all of the features; based on the test parameter values, determining a distribution of parameter values and an average parameter value for the distribution; determining offset amounts between the average parameter value and each of the test parameter values; and, storing the offset amounts in the offset database. 5 . The method of claim 1 , wherein the process comprises a photolithography process. 6 . The method of claim 1 , wherein the process comprises an etch process. 7 . A method comprising: performing a photolithography process on a semiconductor wafer using a specific reticle and according to an initial set of photolithography specifications, the photolithography process being performed to form, from a photoresist layer, a mask with a pattern of features; measuring a parameter of a target feature in the pattern to acquire a parameter value, the target feature being selected from amongst all of the features in the pattern; accessing a photolithography process offset database to acquire an offset amount that is associated with the target feature in the offset database; applying the offset amount to the parameter value to acquire an adjusted parameter value; based on a difference between the adjusted parameter value and a target parameter value for the features, adjusting at least one of the photolithography specifications in the initial set to generate an adjusted set of photolithography specifications; and, repeating the photolithography process either on a different region of the semiconductor wafer or on a different semiconductor wafer according to the adjusted set of photolithography specifications to form a second mask with the pattern of the features, wherein, during the repeating, the adjusted set of photolithography specifications is used to minimize variations between the target parameter value and actual parameter values of features in the pattern of features in the second mask, and wherein the target parameter value is a design goal set to at least one of achieve optimal performance in integrated circuit structures being formed using the photolithography process and avoid fails in the integrated circuit structures being formed using the photolithography process. 8 . The method of claim 7 , wherein the parameter is a dimension, the parameter value is a measurement of the dimension, and the target parameter value is a design-specified value for the dimension. 9 . The method of claim 7 , wherein the parameter is a minimum width, the parameter value is a width measurement, and the target parameter value is a design-specified value for the minimum width. 10 . The method of claim 7 , wherein the at least one of the photolithography specifications comprises exposure energy. 11 . The method of claim 7 , wherein the at least one of the photolithography specifications comprises any of exposure wavelength and lens aperture. 12 . (canceled) 13 . The method of claim 7 , further comprising, before the performing the photolithography process, developing the offset database, wherein the developing of the photolithography process offset database comprises: performing the photolithography process on a test wafer using the specific reticle and according to the initial set of photolithography specifications in order to form, from a test photoresist layer, a test mask with the pattern of features; measuring the parameter on each of the features in the test mask to acquire test parameter values for all of the features; based on the test parameter values, determining a distribution of parameter values and an average parameter value for the distribution; determining offset amounts between the average parameter value and each of the test parameter values; and, storing the offset amounts in the photolithography process offset database. 14 . The method of claim 7 , the method further comprising: performing an etch process using an initial set of etch specifications and the mask to transfer the pattern of features from the mask into a region of the semiconductor wafer below the mask to form a patterned region with a second pattern of second features; measuring a second parameter of a second target feature in the second pattern to acquire a second parameter value, the second target feature being selected from amongst all the second features in the second pattern; accessing an etch process offset database to acquire a second offset amount associated in the etch process offset database with the second target feature; applying the second offset amount to the second parameter value to acquire an adjusted second parameter value; and based on a difference between the adjusted second parameter value and a second target parameter value for the second features, adjusting at least one of the etch specifications in the initial set of etch specifications to generate an adjusted set of etch specifications. 15 . The method of claim 14 , further comprising repeating the photolithography process and the etch process on either a different region of the semiconductor wafer or a different semiconductor wafer using the adjusted set of photolithography specifications and the adjusted set of etch specifications, respectively. 16 . A method comprising: performing an etch process on a semiconductor wafer using a mask and according to an initial set of etch specifications, the mask being formed

Assignees

Inventors

Classifications

  • Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • Photolithographic processes · CPC title

  • for Group V materials or Group III-V materials · CPC title

  • Chemical etching · CPC title

  • H10P74/23Primary

    characterised by multiple measurements, corrections, marking or sorting processes · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2018012813A1 cover?
Disclosed are methods of advanced process control (APC) for particular processes. A particular process (e.g., a photolithography or etch process) is performed on a wafer to create a pattern of features. A parameter is measured on a target feature and the value of the parameter is used for APC. However, instead of performing APC based directly on the actual parameter value, APC is performed base…
Who is the assignee on this patent?
Globalfoundries Inc
What technology area does this patent fall under?
Primary CPC classification H10P74/23. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jan 11 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).