Method for heat treatment of silicon single crystal wafer

Patent metadata

Field	Value
Publication number	US-2017037541-A1
Application number	US-201515107050-A
Country	US
Kind code	A1
Filing date	Aug 1, 2015
Priority date	Jan 16, 2014
Publication date	Feb 9, 2017
Grant date	—

Abstract

A method for a heat treatment of a silicon single crystal wafer in an oxidizing ambient, including: performing the heat treatment based on a condition determined by a tripartite correlation between a heat treatment temperature during the heat treatment, an oxygen concentration in the silicon single crystal wafer before the heat treatment, and a growth condition of a silicon single crystal from which the silicon single crystal wafer is cut out. This provides a method for a heat treatment of a silicon single crystal wafer which can annihilate void defects or micro oxide precipitate nuclei in a silicon single crystal wafer with low cost, efficiently, and securely by a heat treatment in an oxidizing ambient.

First claim

1 - 8 . (canceled)

9 . A method for a heat treatment of a silicon single crystal wafer in an oxidizing ambient, comprising:
performing the heat treatment based on a condition determined by a tripartite correlation between a heat treatment temperature during the heat treatment, an oxygen concentration in the silicon single crystal wafer before the heat treatment, and a growth condition of a silicon single crystal from which the silicon single crystal wafer is cut out.

10 . The method for a heat treatment of a silicon single crystal wafer according to claim 9 , wherein
the silicon single crystal wafer is cut out from a silicon single crystal without nitrogen-doping, and the tripartite correlation is represented by the following relational expression (A-1):
T≧ 37.5[ Oi]+ 72.7 I void A +860  (A-1)

wherein, “T” is the heat treatment temperature (° C.), [Oi] is the oxygen concentration (ppma-JEIDA) in the silicon single crystal wafer before the heat treatment, and IvoidA is represented by the following formula (A-2):
I void A ={( V/G )−( V/G ) crt} ⅓ ×{L (1150−1080)/ V} ½  (A-2)

wherein, “V” is a growth rate (mm/min), “G” is a temperature gradient near an interface (° C./mm), (V/G)crt is a value of V/G when a defect is nonexistent, L(1150−1080) is a length of a temperature zone of void-defect formation of 1,150° C. to 1,080° C. (mm).

11 . The method for a heat treatment of a silicon single crystal wafer according to claim 9 , wherein
the silicon single crystal wafer is cut out from a silicon single crystal doped with nitrogen, and the tripartite correlation is represented by the following relational expression (B-1):
T≧ 37.5[ Oi]+ 72.7 I void B +860  (B-1)

wherein, “T” is the heat treatment temperature (° C.), [Oi] is the oxygen concentration (ppma-JEIDA) in the silicon single crystal wafer before the heat treatment, and IvoidB is represented by the following formula (B-2):
I void B ={( V/G )−( V/G ) crt} ⅓ ×{L (1080−1040)/2 V} ½  (B-2)

wherein, “V” is a growth rate (mm/min), “G” is a temperature gradient near an interface (° C./mm), (V/G)crt is a value of V/G when a defect is nonexistent, L(1080−1040) is a length of a temperature zone of void-defect formation of 1,080° C. to 1,040° C. (mm) when the single crystal is doped with nitrogen.

12 . The method for a heat treatment of a silicon single crystal wafer according to claim 11 , wherein the silicon single crystal wafer is cut out from a silicon single crystal doped with nitrogen at a concentration of 5×1015 atoms/cm3 or less.

13 . The method for a heat treatment of a silicon single crystal wafer according to claim 9 , wherein the silicon single crystal wafer is cut out from a silicon single crystal without a defect due to Interstitial-Si.

14 . The method for a heat treatment of a silicon single crystal wafer according to claim 10 , wherein the silicon single crystal wafer is cut out from a silicon single crystal without a defect due to Interstitial-Si.

15 . The method for a heat treatment of a silicon single crystal wafer according to claim 11 , wherein the silicon single crystal wafer is cut out from a silicon single crystal without a defect due to Interstitial-Si.

16 . The method for a heat treatment of a silicon single crystal wafer according to claim 9 , wherein the heat treatment temperature is 900° C. or more and 1,200° C. or less, and a heat treatment time is 1 minute or more and 180 minutes or less.

17 . The method for a heat treatment of a silicon single crystal wafer according to claim 10 , wherein the heat treatment temperature is 900° C. or more and 1,200° C. or less, and a heat treatment time is 1 minute or more and 180 minutes or less.

18 . The method for a heat treatment of a silicon single crystal wafer according to claim 11 , wherein the heat treatment temperature is 900° C. or more and 1,200° C. or less, and a heat treatment time is 1 minute or more and 180 minutes or less.

19 . The method for a heat treatment of a silicon single crystal wafer according to claim 9 , wherein the oxygen concentration of the silicon single crystal wafer is 8 ppma-JEIDA or less.

20 . The method for a heat treatment of a silicon single crystal wafer according to claim 10 , wherein the oxygen concentration of the silicon single crystal wafer is 8 ppma-JEIDA or less.

21 . The method for a heat treatment of a silicon single crystal wafer according to claim 11 , wherein the oxygen concentration of the silicon single crystal wafer is 8 ppma-JEIDA or less.

22 . The method for a heat treatment of a silicon single crystal wafer according to claim 9 , wherein the thickness of the silicon single crystal wafer is 0.1 mm or more and 20 mm or less.

23 . The method for a heat treatment of a silicon single crystal wafer according to claim 10 , wherein the thickness of the silicon single crystal wafer is 0.1 mm or more and 20 mm or less.

24 . The method for a heat treatment of a silicon single crystal wafer according to claim 11 , wherein the thickness of the silicon single crystal wafer is 0.1 mm or more and 20 mm or less.

Assignees

• Shinetsu Handotai Kk

Inventors

• Hoshi Ryoji
• Kamada Hiroyuki

Classifications

• H10P36/03

  within silicon bodies · CPC title

• H10D62/53 Primary

  the imperfections being within the semiconductor body · CPC title

• C30B33/005

  Oxydation · CPC title

• C01B33/02

  Silicon (forming single crystals or homogeneous polycrystalline material with defined structure C30B) · CPC title

• C30B29/06 Primary

  Silicon · CPC title