Technique to deposit sidewall passivation for high aspect ratio cylinder etch

US2016343580A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016343580-A1
Application numberUS-201615225489-A
CountryUS
Kind codeA1
Filing dateAug 1, 2016
Priority dateDec 4, 2014
Publication dateNov 24, 2016
Grant date

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  1. Title

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in formation of the protective coating along substantially the entire length of the sidewalls. The protective coating may be deposited using particular reactants having low sticking coefficients in some embodiments. The protective coating may also be deposited using particular reaction mechanisms that result in substantially complete sidewall coating. In some cases the protective coating is deposited using plasma assisted atomic layer deposition or plasma assisted chemical vapor deposition.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method of forming an etched feature in a substrate comprising dielectric material, the method comprising: (a) generating a first plasma comprising an etching reactant, exposing the substrate to the first plasma, and partially etching the feature in the substrate; (b) after (a), pre-treating the substrate to form activated surface groups on sidewalls of the feature; (c) after (b) begins, depositing a protective film on sidewalls of the feature, wherein the protective film is deposited as a self-assembled monolayer film; and (d) repeating (a)-(c) until the feature is etched to a final depth, wherein the protective film deposited in (c) substantially prevents lateral etch of the feature during (a), and wherein the feature has an aspect ratio of about 5 or greater at its final depth. 2 . The method of claim 1 , wherein pre-treating the substrate comprises exposing the substrate to vapor comprising H 2 O and/or NH 3 . 3 . The method of claim 1 , wherein pre-treating the substrate comprises exposing the substrate to a pre-treatment plasma, wherein the pre-treatment plasma is generated from a pre-treatment plasma generating gas comprising one or more species selected from the group consisting of: H 2 O, H 2 , O 2 , NH 3 , N 2 H 2 , and N 2 . 4 . The method of claim 1 , wherein the dielectric material is provided in a stack comprising one or more oxide layers and one or more non-oxide layers, and wherein pre-treating the substrate preferentially forms the activated surface groups on sidewalls of the one or more oxide layers compared to the one or more non-oxide layers, and wherein the activated surface groups on sidewalls of the one or more oxide layers comprise surface hydroxyl groups. 5 . The method of claim 1 , wherein the dielectric material is provided in a stack comprising one or more nitride layers and one or more non-nitride layers, and wherein pre-treating the substrate preferentially forms the activated surface groups on sidewalls of the one or more nitride layers compared to the one or more non-nitride layers, and wherein the activated surface groups on sidewalls of the one or more nitride layers comprise surface amine groups. 6 . The method of claim 5 , wherein during (c), the protective film preferentially forms on sidewalls of the nitride layers in the stack. 7 . The method of claim 5 , wherein during (c), the protective film is formed from a self-assembled monolayer precursor comprising a head group comprising a ketone or an aldehyde. 8 . The method of claim 4 , wherein during (c), the protective film preferentially forms on sidewalls of the oxide layers in the stack. 9 . The method of claim 1 , wherein during (c), the protective film is formed from a self-assembled monolayer precursor comprising fluorine. 10 . The method of claim 1 , wherein at the final depth, the feature has an aspect ratio of about 20 or greater, and a bow of about 20% or less. 11 . The method of claim 1 , wherein the feature is formed while forming a 3D NAND device, and wherein the substrate comprises a stack comprising alternating layers of (i) a silicon oxide material, and (ii) a silicon nitride material or a polysilicon material. 12 . The method of claim 1 , wherein the feature is formed while forming a DRAM device, and wherein the dielectric material is provided in a stack comprising silicon oxide. 13 . The method of claim 1 , wherein the dielectric material is provided in a stack comprising one or more layers of a first material and one or more layers of a second material, and wherein the protective film preferentially forms on sidewalls of the first material compared to the second material. 14 . A method of forming an etched feature in a substrate comprising dielectric material, the method comprising: (a) generating a first plasma comprising an etching reactant, exposing the substrate to the first plasma, and partially etching the feature in the substrate; (b) after (a), depositing a protective film on sidewalls of the feature, wherein the protective film is deposited as a self-assembled monolayer film that is substantially free of silicon; (c) repeating (a)-(b) until the feature is etched to a final depth, wherein the protective film deposited in (b) substantially prevents lateral etch of the feature during (a), and wherein the feature has an aspect ratio of about 5 or greater at its final depth. 15 . The method of claim 14 , wherein the protective film is deposited from a self-assembled monolayer precursor that comprises fluorine. 16 . The method of claim 14 , wherein the dielectric material is provided in a stack comprising one or more layers of a first material and one or more layers of a second material, and wherein the protective layer preferentially forms on sidewalls of the one or more layers of first material. 17 . The method of claim 14 , further comprising after (a) and at least partially before (b), exposing the substrate to vapor comprising H 2 O and/or NH 3 to pre-treat the substrate to form activated surface groups on sidewalls of the feature. 18 . The method of claim 14 , further comprising after (a) and at least partially before (b), exposing the substrate to a pre-treatment plasma to form activated surface groups on sidewalls of the feature, wherein the pre-treatment plasma is generated from a pre-treatment plasma generating gas comprising one or more species selected from the group consisting of: H 2 O, H 2 , O 2 , NH 3 , N 2 H 2 , and N 2 . 19 . The method of claim 14 , wherein at the final depth, the feature has an aspect ratio of about 20 or greater and a bow of about 20% or less. 20 . The method of claim 14 , wherein the feature is formed while forming a 3D NAND device, and wherein the substrate comprises a stack comprising alternating layers of (i) a silicon oxide material, and (ii) a silicon nitride material or a polysilicon material. 21 . The method of claim 14 , wherein the feature is formed while forming a DRAM device, and wherein the dielectric material is provided in a stack comprising silicon oxide. 22 . An apparatus for forming an etched feature on a substrate comprising dielectric material, the apparatus comprising: one or more reaction chambers, wherein at least one reaction chamber is designed or configured to perform etching, and wherein at least one reaction chamber is designed or configured to perform deposition, each reaction chamber comprising: an inlet for introducing process gases to the reaction chamber, an outlet for removing material from the reaction chamber, and a plasma source; and a controller comprising executable instructions for: (a) generating a first plasma comprising an etching reactant, exposing the substrate to the first plasma, and partially etching the feature in the substrate; (b) after (a), pre-treating the substrate to form activated surface groups on sidewalls of the feature; (c) after (b) begins, depositing a protective film on sidewalls of the feature, wherein the protective film is deposited as a self-assembled monolayer film; and (d) repeating (a)-(c) until the feature is etched to a final depth, wherein the protective film deposited in (c) substantially prevents lateral etch of the feature during (a), and wherein the feature has an aspect ratio of about 5 or greater at its final depth. 23 . The apparatus of claim 22 , wherein the reaction chamber designed or configured to perform etching is the same reaction chamber designed

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Inventors

Classifications

  • the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC · CPC title

  • carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC · CPC title

  • Organic materials, e.g. photoresists · CPC title

  • Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

  • for drying etching · CPC title

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What does patent US2016343580A1 cover?
Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the …
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification H10P50/283. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Nov 24 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).