Thin film transistor and manufacturing method thereof, array substrate, display device

US2016197274A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016197274-A1
Application numberUS-201514891091-A
CountryUS
Kind codeA1
Filing dateMay 14, 2015
Priority dateDec 3, 2014
Publication dateJul 7, 2016
Grant date

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  5. First independent claim

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Abstract

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A thin film transistor and manufacturing method thereof, an array substrate and a display device are provided. In the manufacturing method of the thin film transistor, manufacturing an active layer includes: forming a germanium thin film, and forming pattern of the active layer through a patterning process; conducting a topological treatment on the germanium thin film with a functionalized element, so as to obtain the active layer ( 4 ) with topological semiconductor characteristics. The resultant thin film transistor has a higher carrier mobility and a better performance.

First claim

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1 . A manufacturing method of a thin film transistor, comprising steps of manufacturing an active layer, wherein, manufacturing the active layer includes: forming a germanium thin film, and forming a pattern of the active layer through a patterning process; and conducting a topological treatment on the germanium thin film with a functionalized element, so as to obtain the active layer with topological semiconductor characteristics. 2 . The manufacturing method according to claim 1 , further comprising steps of forming a source electrode and a drain electrode, wherein, at least one of the source electrode and the drain electrode is formed in such a way that a patterning process is performed on the germanium thin film and a topological treatment is conducted on the germanium thin film with the functionalized element. 3 . (canceled) 4 . The manufacturing method according to claim 1 , wherein, the functionalized element is at least one selected from the group consisting of fluorine element, chlorine element, bromine element and iodine element, and conducting the topological treatment on the germanium thin film with the functionalized element so as to obtain the active layer with topological semiconductor characteristics includes: performing halogenation of the germanium thin film with the functionalized element, so as to obtain a halogenated germanium thin film. 5 . The manufacturing method according to claim 4 , wherein, at least one selected from the group consisting of a vapor phase method, a liquid phase method, a surface modifying method and a plasma treating method is used for halogenation of the germanium thin film. 6 . The manufacturing method according to claim 5 , wherein, the vapor phase method is used for halogenation of the germanium thin film, and performing halogenation of the germanium thin film includes: performing halogenation of the germanium thin film under an atmosphere of bromine gas, a gas pressure being 1 to 10 Pa, and a processing temperature being 50 to 400 degrees Celsius, so as to form the halogenated germanium thin film; or, conducting annealing of the germanium thin film for 10 minutes under the following circumstances: in an atmosphere of chlorine gas, and a processing temperature in a range of 50 to 400 degrees Celsius, so as to form a germanium chloride thin film with topological semiconductor characteristics; or, performing halogenation of the germanium thin film under an atmosphere of iodine gas, a gas pressure being 1 to 10 Pa, and a processing temperature being 60 to 100 degrees Celsius, so as to form a germanium iodide thin film with topological semiconductor characteristics. 7 . The manufacturing method according to claim 5 , wherein, the vapor phase method is used for halogenation of the germanium thin film, and performing halogenation of the germanium thin film includes: performing halogenation of the germanium thin film under an atmosphere of BCl 3 gas, a gas pressure being 1 to 10 Pa, and a processing temperature being 250 to 350 degrees Celsius, and conducting annealing under an atmosphere of a halogen gas at a temperature of 90 to 130 degrees Celsius, so as to form a germanium chloride thin film with topological semiconductor characteristics. 8 . The manufacturing method according to claim 5 , wherein, the liquid phase method is used for halogenation of the germanium thin film, and performing halogenation of the germanium thin film includes: performing halogenations of the germanium thin film under an atmosphere of liquid bromine, concentration of the liquid bromine being in the range of 1% to 10% and a processing temperature being in a range of 40 to 80 degree Celsius, so as to form a germanium bromide thin film. 9 . The manufacturing method according to claim 5 , wherein, the surface modifying method is used for halogenation of the germanium thin film, and performing halogenation of the germanium thin film includes: coating an organic colloidal material containing halogen on a base, and attaching and pressing one side of the base coated with the organic colloidal material to the germanium thin film, so that halogen atoms in the organic colloid are transferred to the germanium thin film, and thus halogenation of the germanium thin film is achieved. 10 . The manufacturing method according to claim 5 , wherein, the plasmas treating method is used for halogenation of the germanium thin film, and performing halogenation of the germanium thin film includes: in an equipment of inductively coupled plasma or reactive ion etching, bombarding a surface of the germanium thin film with halogen plasma, so that halogen plasma is absorbed in the germanium thin film, and thus halogenation of the germanium thin film is achieved. 11 . The manufacturing method according to claim 1 , wherein, the functionalized element is at least one selected from the group consisting of hydrogen element, nitrogen element, boron element and sulfur element. 12 . A thin film transistor, including an active layer, which includes a thin film that contains germanium element and has topological semiconductor characteristics. 13 . The thin film transistor according to claim 12 , wherein, a source electrode and a drain electrode of the thin film transistor are formed by a thin film that contains germanium element and has topological semiconductor characteristics. 14 . The thin film transistor according to claim 13 , wherein, the source electrode, the drain electrode and the active layer of the thin film transistor are located on a same layer. 15 . The thin film transistor according to claim 12 , wherein, the thin film is a halogenated germanium thin film. 16 . The thin film transistor according to claim 15 , wherein, a thickness of the halogenated germanium thin film is in a range of 0.5 to 10 nm. 17 . The thin film transistor according to claim 15 , wherein, the halogenated thin film is a single-atomic-layer halogenated germanium thin film, a double-atomic-layer halogenated germanium thin film, or a multiple-atomic-layer halogenated germanium thin film. 18 . The thin film transistor according to claim 12 , wherein, the thin film is a topological semiconductor thin film formed in such a way that a topological treatment is conducted on the germanium thin film with a hydrogen element, a nitrogen element, a boron element or a sulfur element. 19 . (canceled) 20 . An array substrate, comprising the thin film transistor according to claim 12 . 21 . The array substrate according to claim 20 , further comprising a scan line, a data line and a pixel electrode, and at least one of the scan line, the data line and the pixel electrode is formed by a thin film that contains germanium element and has topological semiconductor characteristics. 22 . (canceled) 23 . A display device, comprising the array substrate according to claim 20 .

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Classifications

  • of conductive parts of the interconnections · CPC title

  • Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates · CPC title

  • having a particular composition, shape or crystalline structure of the active layer · CPC title

  • characterised by control of the annealing or irradiation parameters · CPC title

  • comprising manufacture, treatment or patterning of TFT semiconductor bodies · CPC title

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What does patent US2016197274A1 cover?
A thin film transistor and manufacturing method thereof, an array substrate and a display device are provided. In the manufacturing method of the thin film transistor, manufacturing an active layer includes: forming a germanium thin film, and forming pattern of the active layer through a patterning process; conducting a topological treatment on the germanium thin film with a functionalized elem…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D30/031. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jul 07 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).