Plasma treated semiconductor dichalcogenide materials and devices therefrom

Patent metadata

Field	Value
Publication number	US-2015294875-A1
Application number	US-201514687507-A
Country	US
Kind code	A1
Filing date	Apr 15, 2015
Priority date	Apr 15, 2014
Publication date	Oct 15, 2015
Grant date	—

Abstract

A plasma-based processing method includes depositing a transition metal dichalcogenide (TMDC) material onto a substrate. The TMDC material is plasma treated in an oxygen containing ambient to oxidize the TMDC material to form oxidized dielectric TMDC material. The oxidized dielectric TMDC material has a higher electrical resistivity as compared an electrical resistivity of the TMDC material before the plasma treating, typically >10 3 times greater.

First claim

1 . A plasma-based processing method, comprising:
depositing a transition metal dichalcogenide (TMDC) material on a substrate, and plasma treating said TMDC material in an oxygen comprising ambient to oxidize said TMDC material to form oxidized dielectric TMDC material, said oxidized dielectric TMDC material having a higher electrical resistivity as compared to said TMDC material before said plasma treating.

2 . The method of claim 1 , wherein said oxidized dielectric TMDC material is 1 to 8 atomic layers thick, and wherein said plasma treating oxidizes to form defect regions throughout all said atomic layers of said TMDC material.

3 . The method of claim 1 , wherein said oxygen comprising ambient comprises oxygen mixed with an inert gas.

4 . The method of claim 1 , wherein said depositing comprises mechanically exfoliating said TMDC material from a bulk TMDC onto said substrate.

5 . The method of claim 1 , wherein said TMDC material comprises MoS 2 .

6 . The method of claim 1 , wherein said electrical resistivity of said oxidized dielectric TMDC material is greater than 10 3 times said electrical resistivity of said TMDC material.

7 . A field effect transistor (FET), comprising:
an electrically conductive substrate, a gate dielectric layer on said substrate; an oxidized dielectric transition metal dichalcogenide (TMDC) layer on said gate dielectric layer, said oxidized dielectric TMDC layer having a higher electrical resistivity as compared to a TMDC layer; a drain contact contacting one side of said oxidized dielectric TMDC layer and a source contact contacting another side of said oxidized dielectric TMDC layer.

8 . The FET of claim 7 , wherein said oxidized dielectric TMDC layer is from 1 to 8 atomic layers thick.

9 . The FET of claim 7 , wherein said substrate comprises n+ or p+ doped Si.

10 . The FET of claim 7 , wherein said gate dielectric layer comprises silicon dioxide (SiO 2 ), aluminum oxide (Al 2 O 3 ), or hafnium oxide (HfO 2 ).

11 . The FET of claim 7 , wherein an ON-OFF current ratio for said FET is ≧10 3 .

Assignees

• Univ Central Florida Res Found

Inventors

• Khondaker Saiful
• Islam Muhammad
• Tetard Laurene

Classifications

• H10P95/00

  Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

• H10P14/6939 Primary

  characterised by the metal · CPC title

• H10P14/6532

  by exposure to a plasma · CPC title

• H10P14/6519

  the substance being oxygen · CPC title

• H10P14/6326

  Deposition processes · CPC title