Substrates including micro-structured thin film capacitors

Patent metadata

Field	Value
Publication number	US-12588291-B2
Application number	US-202318333860-A
Country	US
Kind code	B2
Filing date	Jun 13, 2023
Priority date	Jun 13, 2023
Publication date	Mar 24, 2026
Grant date	Mar 24, 2026

Abstract

Disclosed herein are microelectronic assemblies including strengthened glass cores, as well as related devices and methods. In some embodiments, a microelectronic substrate with an in situ capacitor, the capacitor may include a first conductive layer having first microstructures at a first surface, a second conductive layer on the first conductive layer and having second microstructures at a second surface, where the second microstructures vertically interlock with the first microstructures, and a high-k dielectric material between the first microstructures and the second microstructures.

First claim

The invention claimed is:

1 . A microelectronic substrate, comprising:
a first conductive layer having first microstructures at a first surface; a second conductive layer on the first conductive layer, the second conductive layer having second microstructures at a second surface, wherein the second microstructures vertically interlock with the first microstructures; and a high-k dielectric material between the first microstructures and the second microstructures, wherein:
the first microstructures and the second microstructures include pillars or walls; and
the first microstructures include pillars, and one (1) square millimeter (mm 2 ) surface area of the first conductive layer includes between 2,500 pillars and 10,000 pillars.

2 . The microelectronic substrate of claim 1 , wherein a thickness of the first microstructures is between 2 microns and 20 microns.

3 . The microelectronic substrate of claim 1 , wherein a thickness of the high-k dielectric material is between 500 nanometers and 2 microns.

4 . The microelectronic substrate of claim 1 , wherein the high-k dielectric material includes barium, titanium, and oxygen; strontium, titanium, and oxygen; or lead, zirconium, and titanium.

5 . A microelectronic substrate, comprising:
a first conductive layer having first microstructures at a first surface; a second conductive layer on the first conductive layer, the second conductive layer having second microstructures at a second surface, wherein the second microstructures vertically interlock with the first microstructures; and a high-k dielectric material between the first microstructures and the second microstructures, wherein:
the first microstructures and the second microstructures include pillars or walls; and
the first microstructures include pillars, a thickness of the first microstructures is between 5 microns and 15 microns, and a spacing between the first microstructures is between 5 microns and 10 microns.

6 . A microelectronic assembly, comprising:
a substrate having a first surface and an opposing second surface; a capacitor in the substrate adjacent to the second surface, the capacitor including:
a first conductive layer having first microstructures at a surface;
a second conductive layer on the first conductive layer, the second conductive layer having second microstructures at a surface, wherein the second microstructures vertically interlock with the first microstructures; and
a high-k dielectric material between the first microstructures and the second microstructures; and
a die at the second surface of the substrate and electrically coupled to the capacitor, wherein:
the first microstructures include pillars, and one (1) square millimeter (mm 2 ) surface area of the first conductive layer includes between 2,500 pillars and 10,000 pillars.

7 . The microelectronic assembly of claim 6 , wherein the first microstructures and the second microstructures include pillars or walls.

8 . The microelectronic assembly of claim 6 , wherein a thickness of the first microstructures is between 2 microns and 20 microns.

9 . The microelectronic assembly of claim 6 , wherein a thickness of the high-k dielectric material is between 500 nanometers and 2 microns.

10 . The microelectronic assembly of claim 6 , wherein the high-k dielectric material includes barium, titanium, and oxygen; strontium, titanium, and oxygen; or lead, zirconium, and titanium.

11 . The microelectronic assembly of claim 6 , further comprising:
a circuit board electrically coupled to the first surface of the substrate.

12 . A microelectronic assembly, comprising:
a substrate having a first surface and an opposing second surface; a plurality of capacitors in the substrate adjacent to the second surface, the plurality of capacitors including:
a first conductive layer having first microstructures at a surface;
a second conductive layer on the first conductive layer, the second conductive layer having second microstructures at a surface, wherein the second microstructures vertically interlock with the first microstructures; and
a high-k dielectric material between the first microstructures and the second microstructures, wherein:
the first microstructures and the second microstructures include pillars or walls; and
the first microstructures include pillars, and one (1) square millimeter (mm 2 ) surface area of the first conductive layer includes between 2,500 pillars and 10,000 pillars; and

a first die at the second surface of the substrate and electrically coupled to one of the plurality of capacitors; and a second die at the second surface of the substrate and electrically coupled to another one of the plurality of capacitors.

13 . The microelectronic assembly of claim 12 , wherein a thickness of the first microstructures is between 2 microns and 20 microns.

14 . The microelectronic assembly of claim 12 , wherein a thickness of the high-k dielectric material is between 500 nanometers and 2 microns.

15 . The microelectronic assembly of claim 12 , wherein the high-k dielectric material includes barium, titanium, and oxygen; strontium, titanium, and oxygen; or lead, zirconium, and titanium.

16 . The microelectronic assembly of claim 12 , wherein the plurality of capacitors includes between 20 capacitors and 50 capacitors.

Assignees

• Intel Corp

Inventors

• Lin Chun-Hao
• Sun Teng
• Fang Yuxin

Classifications

• H01G4/33 Primary

  Thin- or thick-film capacitors {(thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)} · CPC title

• H10D86/85 Primary

  characterised by only passive components · CPC title