Display substrate, method for manufacturing same, and display device

Patent metadata

Field	Value
Publication number	US-12550441-B2
Application number	US-202218026639-A
Country	US
Kind code	B2
Filing date	Jun 29, 2022
Priority date	Jun 29, 2022
Publication date	Feb 10, 2026
Grant date	Feb 10, 2026

Abstract

The present application provides a display substrate, a method for manufacturing the same, and a display device, which belongs to the technical field of displays. The display substrate includes: a base substrate and a plurality of sub-pixels on the base substrate, the sub-pixels include a sub-pixel driving circuit and a light-emitting element. The sub-pixel driving circuit includes: a first transistor and a second transistor; an active layer structure of the first transistor includes a first active layer and a second active layer connected to the first active layer. The second active layer is located at a side of the first active layer away from the base substrate, the first active layer includes a first active portion and a second active portion which are independent from each other, and the first active portion and the second active portion are connected to two ends of the second active layer, respectively.

First claim

What is claimed is:

1 . A display substrate, comprising: a base substrate and a plurality of sub-pixels on the base substrate, the sub-pixels comprising a sub-pixel driving circuit and a light-emitting element, wherein the sub-pixel driving circuit comprises:
a first transistor and a second transistor; an active layer structure of the first transistor comprises a first active layer and a second active layer connected to the first active layer, the second active layer is located at a side of the first active layer away from the base substrate, the first active layer comprises a first active portion and a second active portion that are independent from each other, and the first active portion and the second active portion are respectively connected to two ends of the second active layer, wherein the first active layer and the second active layer are made of different materials, and the first active layer and an active layer of the second transistor are arranged in a same layer and made of a same material.

2 . The display substrate according to claim 1 , wherein the first active layer is made of polysilicon; and
the second active layer is made of a metal oxide semiconductor.

3 . The display substrate according to claim 2 , wherein the first transistor further comprises:
a gate electrode located on a side of the second active layer facing the base substrate, wherein the gate electrode is located on a side of the first active layer away from the base substrate.

4 . The display substrate according to claim 3 , wherein the gate electrode of the first transistor and a gate electrode of the second transistor are arranged in a same layer and made of a same material.

5 . The display substrate according to claim 3 , comprising the first active layer, a first gate insulating layer, the gate electrode, a second gate insulating layer, the second active layer that are located on the base substrate in sequence, wherein the display substrate further comprises an opening penetrating the first gate insulating layer and the second gate insulating layer, and the second active layer is connected to the first active layer through the opening.

6 . The display substrate according to claim 5 , further comprising:
an intermediate insulating layer located on a side of the second active layer away from the base substrate, wherein an orthographic projection of the intermediate insulating layer onto the base substrate covers an orthographic projection of the opening onto the base substrate; and a source electrode and a drain electrode located at a side of the intermediate insulating layer away from the base substrate, wherein the source electrode and the drain electrode of the first transistor are connected to the first active layer through a via hole penetrating an insulating layer, and the insulating layer is the intermediate insulating layer, or the intermediate insulating layer, the first gate insulating layer and the second gate insulating layer, wherein the source electrode and the drain electrode of the second transistor are connected to the active layer of the second transistor through a via hole penetrating the intermediate insulating layer, the first gate insulating layer and the second gate insulating layer.

7 . The display substrate according to claim 6 , wherein in the first transistor, an orthographic projection of the via hole onto the base substrate at least partially overlaps the orthographic projection of the opening onto the base substrate; or
an orthographic projection of the via hole onto the base substrate does not overlap the orthographic projection of the opening onto the base substrate.

8 . The display substrate according to claim 1 , wherein the display substrate comprises a plurality of power supply lines, a plurality of light-emitting control lines, a plurality of gate lines, a plurality of data lines, a plurality of reset lines and a plurality of initialization signal lines;
the sub-pixel driving circuit comprises a reset transistor, a compensation transistor, a data writing transistor, an initialization transistor, a first light-emitting control transistor, a second light-emitting control transistor, and a driving transistor; a gate electrode of the reset transistor is coupled to a corresponding one of the reset lines, a first electrode of the reset transistor is coupled to a corresponding one of the initialization signal lines, and a second electrode of the reset transistor is coupled to a gate electrode of the driving transistor; a gate electrode of the compensation transistor is coupled to a corresponding one of the gate lines, a first electrode of the compensation transistor is coupled to the gate electrode of the driving transistor, and a second electrode of the compensation transistor is coupled to a drain electrode of the driving transistor; a gate electrode of the data writing transistor is coupled to a corresponding one of the gate lines, a first electrode of the data writing transistor is coupled to a corresponding one of the data lines, and a second electrode of the data writing transistor is coupled to a source electrode of the driving transistor; a gate electrode of the first light-emitting control transistor is coupled to a corresponding one of the light-emitting control lines, a first electrode of the first light-emitting control transistor is coupled to a first electrode of a light-emitting unit, and a second electrode of the first light-emitting control transistor is coupled to the drain electrode of the driving transistor; a gate electrode of the second light-emitting control transistor is coupled to a corresponding one of the light-emitting control lines, a first electrode of the second light-emitting control transistor is coupled to a corresponding one of the power supply lines, and a second electrode of the second light-emitting control transistor is coupled to the source electrode of the driving transistor; and a gate electrode of the initialization transistor is coupled to a corresponding one of the gate lines, a first electrode of the initialization transistor is coupled to a corresponding one of the initialization signal lines, and a second electrode of the initialization transistor is coupled to the first electrode of the light-emitting unit.

9 . The display substrate according to claim 8 , wherein the first transistor comprises the reset transistor, the compensation transistor, the data writing transistor and the initialization transistor; or
the first transistor comprises the reset transistor and the compensation transistor.

10 . The display substrate according to claim 9 , wherein an orthographic projection of the first active layer of the first transistor onto the base substrate does not overlap orthographic projections of the gate lines onto the base substrate.

11 . The display substrate according to claim 9 , wherein a connection line between the second electrode of the data writing transistor and the source electrode of the driving transistor comprises first connection portions and a second connection portion, the first connection portion and the first active layer are arranged in the same layer and made of the same material, the second connection portion is fabricated by a source and drain metal layer, the first connection portions are broken at a position where the connection line and the light-emitting control line intersect, and the broken first connection portions are connected through the second connection portion.

12 . A display device, comprising the display substrate according to claim 1 .

13 . A method for manufacturing a display substrate, comprising: forming a plurality of sub-pix

Assignees

• Chongqing Boe Display Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Li Qiujie
• Hou Weiwei
• Li Shuanzhu
• Wang Wentao
• Shi Dawei
• Gong Weixing
• Niu Liqiang

Classifications

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/0221 Primary

  comprising manufacture, treatment or patterning of TFT semiconductor bodies · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10K59/1213

  the pixel elements being TFTs · CPC title

• H10D86/60 Primary

  wherein the TFTs are in active matrices · CPC title