Array substrate, display panel, display apparatus, and method for manufacturing array substrate

Patent metadata

Field	Value
Publication number	US-10446589-B2
Application number	US-201816031139-A
Country	US
Kind code	B2
Filing date	Jul 10, 2018
Priority date	Nov 30, 2017
Publication date	Oct 15, 2019
Grant date	Oct 15, 2019

Abstract

An array substrate, display panel, display apparatus, and method for manufacturing the array substrate are provided. Array substrate includes pixel driving circuit and peripheral driving circuit. Array substrate further includes a plurality of thin film transistors including first type of thin film transistor electrically connected into peripheral driving circuit for outputting driving signal and second type of thin film transistor connected to peripheral driving circuit for outputting scanning signal. The thin film transistor includes an active layer of oxide semiconductor including at least one sub-layer. Compared with second type of thin film transistor, active layer of first type of thin film transistor has more sub-layers, and thickness of active layer of first type of thin film transistor is larger. Each sub-layer of the active layer of the second type of thin film transistor is in a same layer as the active layer of the first type of thin film transistor.

First claim

What is claimed is:

1. An array substrate, comprising a base-substrate and a plurality of circuit structures disposed on a side of the base-substrate;
wherein the plurality of circuit structures comprises a pixel driving circuit located in a display region and a peripheral driving circuit surrounding the display region;
the plurality of circuit structures comprises a plurality of thin film transistors comprising a first type of thin film transistor and a second type of thin film transistor, and each of the plurality of thin film transistors comprises a gate electrode, a gate insulation layer, an active layer of an oxide semiconductor comprising at least one sub-layer, and a source-drain electrode stacked in a direction perpendicular to the base-substrate;
the active layer of the first type of thin film transistor has more sub-layers than that of the active layer of the second type of thin film transistor, a total thickness of the active layer of the first type of thin film transistor is larger than a total thickness of the active layer of the second type of thin film transistor, and each sub-layer of the active layer of the second type of thin film transistor is in a same layer as the active layer of the first type of thin film transistor;
the first type of thin film transistor is electrically connected into the pixel driving circuit, and is configured to output a driving signal for controlling brightness of a display device; and
the second type of thin film transistor is electrically connected into the peripheral driving circuit, and is configured to output a scanning signal.

2. The array substrate according to claim 1 , wherein
the first type of thin film transistor is directly electrically connected to a display device in the pixel driving circuit; and
the second type of thin film transistor is directly electrically connected to an output of the peripheral driving circuit.

3. The array substrate according to claim 2 , further comprising a first active layer and a second active layer that are stacked in a direction perpendicular to the base-substrate; wherein
the active layer of the first type of thin film transistor is a double-layer structure, which is in a same layer as the first active layer and the second active layer; and
the active layer of the second type of thin film transistor is a single-layer structure, which is in a same layer as the second active layer.

4. The array substrate according to claim 1 , wherein
the active layer of the first type of thin film transistor is divided into a first part and a second part, wherein the first part is in a same layer as the active layer of the second type of thin film transistor, and the second part is in different layers from the active layer of the second type of thin film transistor, and that the first part is located on a side of the second part facing away from the base-substrate.

5. The array substrate according to claim 1 , further comprising a first active layer and a second active layer that are stacked in a direction perpendicular to the base-substrate; wherein
the active layer of the first type of thin film transistor is a double-layer structure, which is in a same layer as the first active layer and the second active layer, respectively; and
the active layer of the second type of thin film transistor is a single-layer structure, which is in a same layer as the second active layer.

6. The array substrate according to claim 5 , wherein
in the first type of thin film transistor, an orthographic projection of the second active layer on the base-substrate covers an orthographic projection of the first active layer on the base-sub state.

7. The array substrate according to claim 5 , wherein
each active layer of the first type of thin film transistor comprises a channel region and a source-drain contact region located at both ends of the channel region; an orthographic projection of the first active layer on the channel region is consistent with an orthographic projection of the second active layer on the channel region.

8. The array substrate according to claim 5 , wherein
a thickness of the first active layer is smaller than a thickness of the second active layer.

9. The array substrate according to claim 5 , wherein
a thickness of the second active layer ranges from 300 Å to 500 Å.

10. The array substrate according to claim 9 , wherein
the thickness of the second active layer is 400 Å.

11. The array substrate according to claim 9 , wherein
a thickness of the first active layer ranges from 50 Å to 200 Å.

12. The array substrate according to claim 1 , wherein
a difference between the total thickness of the active layer of the first type of thin film transistor and the total thickness of the active layer of the second type of thin film transistor ranges from 10 Å to 500 Å.

13. The array substrate according to claim 1 , wherein
a gate electrode of the first type of thin film transistor is in a same layer as a gate electrode of the second type of thin film transistor;
a gate insulation layer of the first type of thin film transistor is in a same layer as a gate insulation layer of the second type of thin film transistor;
a source-drain electrode of the first type of thin film transistor is in a same layer as a source-drain electrode of the second type of thin film transistor.

14. The array substrate according to claim 1 , wherein
positions at which the plurality of thin film transistors is located in the plurality of circuit structures comprise a first position, during working of the plurality of circuit structures, one of the plurality of thin film transistors located at the first position is in a positive bias state for a longer time than being in a negative bias state, and the one of the plurality of thin film transistors located at the first position is the first type of thin film transistor.

15. The array substrate according to claim 1 , wherein
positions at which the plurality of thin film transistors is located in the plurality of circuit structures further comprise a second position, during working of the plurality of circuit structures, one of the plurality of thin film transistors located at the second position has a voltage difference between its gate electrode and its source electrode, which is zero for a longer time than being positive, and the one of the plurality of thin film transistors located at the second position is the second type of thin film transistor.

16. The array substrate according to claim 1 , wherein
positions at which the plurality of thin film transistors is located in the plurality of circuit structures further comprise a third position, during working of the plurality of circuit structures, one of the plurality of thin film transistors located at the third position is used to provide a signal to a device that needs to respond to a precise signal, and the one of the plurality of thin film transistors located at the third position is the first type of thin film transistor.

17. A display panel, comprising an array substrate and a display function layer, wherein the array substrate comprises a base-substrate and a plurality of circuit structures disposed on a side of the base-substrate;
wherein the plurality of circuit structures comprises a pixel driving circuit located in a display region and a peripheral driving circuit surrounding the display region;
the plurality of circuit structures comprises a plurality of thin film transistors comprising a first type of thin film transistor and a second type of thin film transistor, and each of the plurality of t

Assignees

• Shanghai Tianma Micro Elect Co

Inventors

• Lou Junhui
• Wu Tianyi
• Fu Jujian

Classifications

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F1/13454

  Drivers integrated on the active matrix substrate (G02F1/136277 takes precedence) · CPC title

• G09G3/3233

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G2300/0408

  Integration of the drivers onto the display substrate · CPC title

• G09G3/3266

  Details of drivers for scan electrodes · CPC title