Thin Film Transistor Array Substrate and Electronic Device Including the Same

Patent metadata

Field	Value
Publication number	US-2022123120-A1
Application number	US-202117505115-A
Country	US
Kind code	A1
Filing date	Oct 19, 2021
Priority date	Oct 20, 2020
Publication date	Apr 21, 2022
Grant date	—

Abstract

A thin film transistor array substrate and an electronic device including the thin film transistor array are disclosed. The thin film transistor comprises a substrate, a first active layer on the substrate, a gate electrode on the first active layer, a second active layer on the gate electrode such that the gate electrode is between the first active layer and the second active layer. The gate electrode is configured to drive the first active layer and the second active layer. Thereby, it is possible to provide the thin film transistor array substrate including one or more thin film transistors having high current characteristics in a small area, and the electronic device including the thin film transistor array substrate.

First claim

What is claimed is:

1 . An electronic device comprising:
a panel including at least one thin film transistor; and a driving circuit configured to drive the panel, wherein the panel comprises:
a substrate;
a first active layer disposed over the substrate, the first active layer including a first region, a second region spaced apart from the first region, and a first channel region disposed between the first region and the second region;
a first gate insulating film disposed on the first active layer;
a gate electrode disposed on the first gate insulating film;
a second gate insulating film disposed on the gate electrode;
a second active layer comprising at least one layer and disposed on the second gate insulating film such that the second active layer overlaps the gate electrode, the second active layer including a third region, a fourth region spaced apart from the third region, and a second channel region disposed between the third region and the fourth region;
a first electrode disposed on the third region of the second active layer; and
a second electrode spaced apart from the first electrode, disposed on the fourth region of the second active layer.

2 . The electronic device according to claim 1 , wherein the first gate insulating film overlaps a part of the first active layer.

3 . The electronic device according to claim 1 , wherein the first active layer includes a first auxiliary region disposed between the first region and the first channel region of the first active layer, and a second auxiliary region disposed between the second region and the first channel region of the first active layer, and
wherein an electrical resistance value of the first auxiliary region and an electrical resistance value of the second auxiliary region are greater than an electrical resistance value of the first region and an electrical resistance of the second region, and the electrical resistance value of the first auxiliary region and the electrical resistance value of the second auxiliary region are less than an electrical resistance value of the first channel region.

4 . The electronic device according to claim 3 , wherein a first end of the first auxiliary region overlaps a first end of the first gate insulating film but not the gate electrode, and a second end of the first auxiliary region overlaps the gate electrode and the first gate insulating film.

5 . The electronic device according to claim 4 , wherein a first end of the second auxiliary region overlaps a second end of the first gate insulating film but not the gate electrode, and a second end of the second auxiliary region overlaps the gate electrode and the first gate insulating film.

6 . The electronic device according to claim 3 , wherein the second active layer includes a third auxiliary region disposed between the third region and the second channel region of the second active layer, and a fourth auxiliary region disposed between the fourth region and the second channel region of the second active layer, and
wherein an electrical resistance value of the third auxiliary region and an electrical resistance value of the fourth auxiliary region are greater than an electrical resistance value of the third region and an electrical resistance of the fourth region, and the electrical resistance value of the third auxiliary region and the electrical resistance value of the fourth auxiliary region is less than an electrical resistance value of the second channel region.

7 . The electronic device according to claim 6 , wherein a first end of the third auxiliary region overlaps the first end of the first gate insulating film but not the first electrode, and a second end of the third auxiliary region overlaps the gate electrode and the first gate insulating film.

8 . The electronic device according to claim 7 , wherein a first end of the fourth auxiliary region overlaps the second end of the first gate insulating film but not the second electrode, and a second end of the fourth auxiliary region overlaps the gate electrode and the first gate insulating film.

9 . The electronic device according to claim 6 , wherein a length of the third auxiliary region and a length of the fourth auxiliary region of the second active layer are less than a length of the first auxiliary region and a length of the second auxiliary region of the first active layer.

10 . The electronic device according to claim 6 , wherein an electrical resistance value of the third auxiliary region and an electrical resistance value of the fourth auxiliary region are greater than an electrical resistance value of the first auxiliary region and an electrical resistance value of the second auxiliary region.

11 . The electronic device according to claim 6 , wherein the first auxiliary region comprises first carriers diffused from the first region of the first active layer, the second auxiliary region comprises second carriers diffused from the second region of the first active layer, the third auxiliary region comprises carriers diffused from the third region of the second active layer, and the fourth auxiliary region comprises carriers diffused from the fourth region of the second active layer.

12 . The electronic device according to claim 6 , wherein the first auxiliary region comprises hydrogen and first carriers diffusing from the first region, and the second auxiliary region comprises the hydrogen and second carriers diffusing from the second region, while the third auxiliary region comprises third carriers diffusing from the third region, and the fourth auxiliary region comprises fourth carries diffusing from the fourth region.

13 . The electronic device according to claim 1 , wherein a length of the first channel region and a length of the second channel region are less than or equal to a length of the gate electrode.

14 . The electronic device according to claim 1 , wherein each of the first electrode and the second electrode includes titanium or an alloy including titanium.

15 . The electronic device according to claim 1 , wherein an end of the first electrode is aligned with a first end of the gate electrode, and
wherein an end of the second electrode is aligned with a second end of the gate electrode.

16 . The electronic device according to claim 1 , wherein the first electrode and the second electrode are non-overlapping with the gate electrode.

17 . The electronic device according to claim 1 , wherein the third region contacts the first electrode, and the fourth region contacts the second electrode.

18 . The electronic device according to claim 17 , wherein an oxygen concentration of the third region and an oxygen concentration of the fourth region are less than an oxygen concentration of the second channel region.

19 . The electronic device according to claim 1 , wherein the first active layer is comprises an oxide of zinc, indium, gallium, tin, titanium, or molybdenum, or a combination of zinc, indium, gallium, tin, titanium, or molybdenum and an oxide of zinc, indium, gallium, tin, titanium, or molybdenum, and the second active layer comprises an oxide of zinc, indium, gallium, tin, or titanium, or a combination of zinc, indium, gallium, or tin, titanium and an oxide of zinc, indium, gallium, or tin, or titanium.

20 . The electronic device according to claim 1 , wherein the thin film transistor is a driving transistor disposed in an active region of the panel, the active region configured to display an image.

21 . The electronic device

Assignees

• Lg Display Co Ltd

Inventors

• Lee Dohyung
• Baeck Juheyuck
• Jeong Chanyong

Classifications

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D30/6739

  Conductor-insulator-semiconductor electrodes · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/431

  having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs · CPC title