Highly textured buffer layer to grow YBiPt (110) for spintronic applications

Patent metadata

Field	Value
Publication number	US-12505856-B2
Application number	US-202418740054-A
Country	US
Kind code	B2
Filing date	Jun 11, 2024
Priority date	Jun 14, 2023
Publication date	Dec 23, 2025
Grant date	Dec 23, 2025

Abstract

The present disclosure generally relates to spintronic material stacks and devices. The various disclosed embodiments of YBiPt based spin orbit torque (SOT) stacks can be used for high temperature applications. Disclosed herein are various buffer and/or interlayer configurations in spintronic stacks that can promote growth of YBiPt in the (110) orientation, to promote a high spin Hall angle (SHA) in SOT applications. One embodiment is a spintronic stack comprising a buffer layer comprising one or more layers, the one or more layers each individually comprising: MgO (100), TiN (100), Ta, Nb, HfN, Ta 3 W 2 (110), TaW 2 (100), Ta 3 W 2 N, TaW 2 N, or heated YPt, an SOT layer comprising YBiPt in the (110) orientation, an interlayer comprising one or more of MgO, Ta 3 WN, TaW 3 N, Ta 3 W (110), TaW 3 (100), YPt (110), NiFeGeN, NiAlN, NiAl, NiFeGe, NiAlGe, or HfN, and a ferromagnetic layer.

First claim

What is claimed is:

1 . A spintronic stack, comprising:
a buffer layer comprising a textured layer comprising Ta or Nb; a spin orbit torque (SOT) layer comprising YBiPt in the (110) orientation disposed over the buffer layer; an interlayer disposed over the SOT layer; and a ferromagnetic layer disposed over the interlayer.

2 . The spintronic stack of claim 1 , wherein the buffer further comprises:
a first sub-layer comprising Ta; a second sub-layer disposed over the first sub-layer, comprising Cr; and a third sub-layer, the textured layer, disposed over the second sub-layer, comprising Ta or Nb.

3 . The spintronic stack of claim 2 , wherein the Ta in the first sub-layer is Beta-Ta and the Ta in the third sub-layer is Alpha-Ta.

4 . The spintronic stack of claim 3 , wherein the Beta-Ta of the third sub-layer is thicker than the Alpha-Ta of the first sub-layer.

5 . The spintronic stack of claim 1 , wherein the buffer further comprises:
a first sub-layer comprising Ta; a second sub-layer disposed over the first sub-layer, comprising Cr, V, Mo, or alloys thereof; a third sub-layer disposed over the second sub-layer, comprising Mo, W, WTi, or alloys thereof; and a fourth sub-layer, the textured layer, disposed over the third sub-layer, comprising Ta or Nb.

6 . The spintronic stack of claim 5 , wherein the Ta in the first sub-layer is Beta-Ta and the Ta in the fourth sub-layer is Alpha-Ta.

7 . The spintronic stack of claim 5 , wherein the Beta-Ta of the fourth sub-layer is thicker than the Alpha-Ta of the first sub-layer.

8 . The spintronic stack of claim 1 , further comprising an amorphous layer comprising CoX, CoFeX, NiX, or NiFeX, where X is one or more of Ta, W, Hf, and Ge, wherein the amorphous layer is nitrogenated, and wherein buffer layer is disposed over the amorphous layer.

9 . The spintronic stack of claim 1 , wherein the interlayer comprises Ta or Nb.

10 . A memory cell comprising the spintronic stack of claim 1 .

11 . A logic cell comprising the spintronic stack of claim 1 .

12 . A magnetic sensor comprising the spintronic stack of claim 1 .

13 . A spintronic stack, comprising:
a buffer layer comprising HfN, Ta 3 W (110), TaW 3 (100), Ta 3 WN, TaW 3 N, MgO (100), TiN (100), or YPt; a spin orbit torque (SOT) layer comprising YBiPt in the (110) orientation disposed over the buffer layer; an interlayer disposed over the SOT layer; and a ferromagnetic layer disposed over the interlayer.

14 . The spintronic stack of claim 13 , wherein the buffer layer is a multilayer stack.

15 . The spintronic stack of claim 13 , wherein the buffer layer further comprises:
a first sub-layer comprising Ta 3 W (110), TaW 3 (100), or YPt (110); and a second sub-layer comprising HfN, Ta 3 W (110), TaW 3 (100), or YPt (110).

16 . The spintronic stack of claim 15 , wherein the second sub-layer comprises HfN, and wherein the first and second sub-layers comprise different materials.

17 . The spintronic stack of claim 15 , wherein the buffer layer further comprises a third sub-layer disposed between the first sub-layer and the second sub-layer, the third sub-layer comprising Ta 3 WN (110), TaW 3 N (100), TiN, or YPt (110).

18 . The spintronic stack of claim 13 , wherein the interlayer comprises one or more materials selected from the group consisting of: HfN, Ta 3 W (110), TaW 3 (100), NiFeGe, NiAlGe or YPt (110), MgO, TiN, TiO, MgTiO, or MgTiN.

19 . A memory cell comprising the spintronic stack of claim 13 .

20 . A logic cell comprising the spintronic stack of claim 13 .

21 . A magnetic sensor comprising the spintronic stack of claim 13 .

22 . A spintronic stack, comprising:
an amorphous layer comprising CoX, CoFeX, NiX, or NiFeX, where X is one or more of Ta, W, Hf, and Ge; a buffer layer disposed over the amorphous layer, the buffer layer comprising:
(1) a texturing template layer comprising MgO (100), TiN (100), RuAl (100), or YPt disposed over the amorphous layer; and
(2) two or more textured sub-layers disposed over the texturing template layer, the two or more textured sub-layers each individually comprising a material selected from the group consisting of: a bcc alloy of Ta, W, Nb, V, and Hf, and a fcc alloy nitride compounds of Ta, W, Nb, V, and Hf;
a spin orbit torque (SOT) layer comprising YBiPt in the (110) orientation disposed over the buffer layer; an interlayer disposed over the SOT layer, the interlayer comprising a first sub-layer and a second sub-layer, the first sub-layer comprising a material selected from the group consisting of: Ta 3 WN, TaW 3 N, Ta 3 W (110), TaW 3 (100), YPt (110), NiFeGeN, NiAlN, NiAl, NiFeGe, NiAlGe, and HfN, and the second sub-layer being an oxide layer; a ferromagnetic layer disposed over the second sub-layer of the interlayer; and a capping layer disposed over the ferromagnetic layer.

23 . The spintronic stack of claim 22 , wherein a first sub-layer of the two or more textured sub-layers comprises Ta 3 W (110), TaW 3 (100), or YPt (110), and wherein a second sub-layer of the two or more textured sub-layers comprises HfN, Ta 3 W (110), TaW 3 (100), or YPt (110).

24 . The spintronic stack of claim 23 , wherein the buffer layer further comprises a third sub-layer disposed between the first sub-layer and the second sub-layer, the third sub-layer comprising Ta 3 WN (110), TaW 3 N (100), TiN, or YPt (110), and wherein the third sub-layer comprises a different material than the first and second sub-layers.

25 . The spintronic stack of claim 22 , wherein the interlayer comprises two or more sub-interlayers.

26 . The spintronic stack of claim 25 , wherein a first sub-interlayer comprises HfN, Ta 3 W (110), TaW 3 (100), or YPt (110), and wherein a second sub-interlayer comprises MgO, HfN, Ta 3 W (110), TaW 3 (100), or YPt (110).

27 . The spintronic stack of claim 26 , wherein the interlayer further comprises a third sub-interlayer, the third sub-interlayer comprising MgO, HfN, Ta 3 W (110), TaW 3 (100), or YPt (110), and wherein the first, second, and third sub-interlayers each comprise a different material.

28 . The spintronic stack of claim 26 , wherein the interlayer further comprises one or more of TiN, TiO, MgTiO, or MgTiN.

29 . A memory cell comprising the spintronic stack of claim 22 .

30 . A logic cell comprising the spintronic stack of claim 22 .

31 . A magnetic sensor comprising the spintronic stack of claim 22 .

Assignees

• Western Digital Tech Inc

Inventors

• Le Quang
• York Brian R
• Banh Sharon Swee Ling
• Osman Hassan
• Takano Hisashi

Classifications

• G11C11/18

  using Hall-effect devices · CPC title

• H10N50/85

  Materials of the active region · CPC title

• G01R33/093

  using multilayer structures, e.g. giant magnetoresistance sensors (thin magnetic films H01F10/00) · CPC title

• H10N50/10 Primary

  Magnetoresistive devices · CPC title

• H03K19/18

  using galvano-magnetic devices, e.g. Hall-effect devices · CPC title