Semiconductor device and method for manufacturing semiconductor device

US12490475B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12490475-B2
Application numberUS-202418598184-A
CountryUS
Kind codeB2
Filing dateMar 7, 2024
Priority dateOct 12, 2018
Publication dateDec 2, 2025
Grant dateDec 2, 2025

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device having high reliability is provided. The semiconductor device includes a transistor and an insulator placed so as to surround the transistor; the insulator has a barrier property against hydrogen; the transistor includes an oxide and a conductor, the conductor includes nitrogen and a metal; the conductor has a physical property of extracting hydrogen; the conductor includes a region having a hydrogen concentration higher than or equal to 2.0×10 19 atoms/cm 3 and lower than or equal to 1.0×10 21 atoms/cm 3 ; and at least part of hydrogen atoms included in the region is bonded to a nitrogen atom.

First claim

Opening claim text (preview).

What is claimed is: 1 . A semiconductor device comprising: a first gate electrode; a first gate insulator over the first gate electrode; an oxide semiconductor comprising a channel of a transistor over the first gate insulator; a first conductor and a second conductor each over and in contact with the oxide semiconductor; a first insulator over the first conductor and the second conductor; a second insulator over the first insulator; a second gate insulator in a first opening of the first insulator and the second insulator; a second gate electrode over the second gate insulator and in the first opening; and a third insulator in contact with a top surface of the second gate electrode, a top surface of the second gate insulator, and a top surface of the second insulator, wherein the top surface of the second insulator, the top surface of the second gate insulator, and the top surface of the second gate electrode are aligned with each other, wherein a first side surface of the first conductor is aligned with a first side surface of the oxide semiconductor, wherein a first side surface of the second conductor is aligned with a second side surface of the oxide semiconductor, and wherein each of the first conductor and the second conductor includes tantalum nitride. 2 . The semiconductor device according to claim 1 , wherein the oxide semiconductor includes indium. 3 . The semiconductor device according to claim 1 , wherein the oxide semiconductor comprises a first oxide semiconductor layer and a second oxide semiconductor layer over the first oxide semiconductor layer. 4 . The semiconductor device according to claim 1 , wherein the tantalum nitride has crystallinity. 5 . The semiconductor device according to claim 1 , wherein the first insulator covers a top surface and the first side surface of the first conductor, a top surface and the first side surface of the second conductor, and the first side surface and the second side surface of the oxide semiconductor. 6 . The semiconductor device according to claim 1 , wherein the first insulator includes aluminum oxide. 7 . A semiconductor device comprising: a first gate electrode; an oxide semiconductor comprising a channel of a transistor over the first gate electrode; a first conductor and a second conductor each over and in contact with the oxide semiconductor; a first insulator over the first conductor and the second conductor; a second insulator over the first insulator; a second gate electrode in a first opening of the first insulator and the second insulator; a third conductor electrically connected to the first conductor through a second opening of the first insulator and the second insulator; a fourth conductor electrically connected to the second conductor through a third opening of the first insulator and the second insulator; and a third insulator over the second insulator, wherein a first side surface of the first conductor is aligned with a first side surface of the oxide semiconductor, wherein a first side surface of the second conductor is aligned with a second side surface of the oxide semiconductor, and wherein each of the first conductor and the second conductor includes tantalum nitride. 8 . The semiconductor device according to claim 7 , wherein the oxide semiconductor includes indium. 9 . The semiconductor device according to claim 7 , wherein the oxide semiconductor comprises a first oxide semiconductor layer and a second oxide semiconductor layer over the first oxide semiconductor layer. 10 . The semiconductor device according to claim 7 , wherein the tantalum nitride has crystallinity. 11 . The semiconductor device according to claim 7 , wherein the first insulator covers a top surface and the first side surface of the first conductor, a top surface and the first side surface of the second conductor, and the first side surface and the second side surface of the oxide semiconductor. 12 . The semiconductor device according to claim 7 , wherein the first insulator includes aluminum oxide.

Assignees

Inventors

Classifications

  • comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

  • wherein the TFTs are in active matrices · CPC title

  • Manufacturing their channels · CPC title

  • using silicon technology, e.g. SiGe · CPC title

  • Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers · CPC title

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Frequently asked questions

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What does patent US12490475B2 cover?
A semiconductor device having high reliability is provided. The semiconductor device includes a transistor and an insulator placed so as to surround the transistor; the insulator has a barrier property against hydrogen; the transistor includes an oxide and a conductor, the conductor includes nitrogen and a metal; the conductor has a physical property of extracting hydrogen; the conductor includ…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D30/6756. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 02 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).