Semiconductor device and measurement device

Patent metadata

Field	Value
Publication number	US-9343578-B2
Application number	US-201314141838-A
Country	US
Kind code	B2
Filing date	Dec 27, 2013
Priority date	Dec 28, 2012
Publication date	May 17, 2016
Grant date	May 17, 2016

Abstract

A semiconductor device includes an oxide semiconductor layer over a first oxide layer; first source and drain electrodes over the oxide semiconductor layer; second source and drain electrodes over the first source and drain electrodes respectively; a second oxide layer over the first source and drain electrodes; a gate insulating layer over the second source and drain electrodes and the second oxide layer; and a gate electrode overlapping the oxide semiconductor layer with the gate insulating layer provided therebetween. The structure in which the oxide semiconductor layer is sandwiched by the oxide layers can suppress the entry of impurities into the oxide semiconductor layer. The structure in which the oxide semiconductor layer is contacting with the source and drain electrodes can prevent increasing resistance between the source and the drain comparing one in which an oxide semiconductor layer is electrically connected to source and drain electrodes through an oxide layer.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first oxide layer;
an oxide semiconductor layer which is over the first oxide layer and in which a channel is formed;
a first source electrode and a first drain electrode in contact with a top surface of the oxide semiconductor layer;
a second source electrode which is over the first source electrode and is electrically connected to the first source electrode;
a second drain electrode which is over the first drain electrode and is electrically connected to the first drain electrode;
a second oxide layer over the first source electrode and the first drain electrode;
a gate insulating layer over the second source electrode, the second drain electrode, and the second oxide layer; and
a gate electrode over the gate insulating layer,
wherein the second oxide layer is in contact with the top surface of the oxide semiconductor layer at least partly.

2. The semiconductor device according to claim 1 , wherein at least one of the first oxide layer and the second oxide layer contains one or more kinds of metal elements which are the same as metal elements contained in the oxide semiconductor layer.

3. The semiconductor device according to claim 1 , wherein at least one of electron affinity of the first oxide layer and electron affinity of the second oxide layer is smaller than electron affinity of the oxide semiconductor layer.

4. The semiconductor device according to claim 1 , comprising a fourth oxide layer in contact with a top surface of the second oxide layer,
wherein the fourth oxide layer contains one or more kinds of metal elements which are the same as metal elements contained in the second oxide layer.

5. The semiconductor device according to claim 4 , wherein electron affinity of the fourth oxide layer is smaller than electron affinity of the second oxide layer.

6. The semiconductor device according to claim 1 ,
wherein the first source electrode and the first drain electrode comprises a first material, and the second source electrode and the second drain electrode comprises a second material, and
wherein the first material has a lower oxidation potential than the second material.

7. The semiconductor device according to claim 1 , wherein the gate insulating layer comprises a hafnium oxide film.

8. The semiconductor device according to claim 1 , wherein the gate insulating layer comprises an aluminum oxide film.

9. The semiconductor device according to claim 1 , comprising a protective insulating layer over the gate electrode,
wherein the gate insulating layer comprises a silicon oxide film or a silicon oxynitride film, and
wherein the protective insulating layer comprises a silicon nitride film or an aluminum oxide film.

10. A semiconductor device comprising:
an insulating layer containing oxygen;
a first oxide layer in contact with a top surface of the insulating layer;
an oxide semiconductor layer which is over the first oxide layer and in which a channel is formed;
a first source electrode and a first drain electrode in contact with a top surface of the oxide semiconductor layer;
a second source electrode electrically connected to the first source electrode;
a second drain electrode electrically connected to the first drain electrode;
a second oxide layer over the first source electrode, the first drain electrode, the second source electrode, and the second drain electrode;
a gate insulating layer over the second oxide layer; and
a gate electrode over the gate insulating layer,
wherein the second source electrode, the second drain electrode, and the second oxide layer are in contact with the top surface of the oxide semiconductor layer.

11. The semiconductor device according to claim 10 , comprising a region where the insulating layer is in contact with the second oxide layer outside the oxide semiconductor layer.

12. The semiconductor device according to claim 10 , comprising a third oxide layer between the insulating layer and the first oxide layer,
wherein the third oxide layer contains one or more kinds of metal elements which are the same as metal elements contained in the first oxide layer.

13. The semiconductor device according to claim 12 , wherein electron affinity of the third oxide layer is smaller than electron affinity of the first oxide layer.

14. The semiconductor device according to claim 10 , wherein at least one of the first oxide layer and the second oxide layer contains one or more kinds of metal elements which are the same as metal elements contained in the oxide semiconductor layer.

15. The semiconductor device according to claim 10 , wherein at least one of electron affinity of the first oxide layer and electron affinity of the second oxide layer is smaller than electron affinity of the oxide semiconductor layer.

16. The semiconductor device according to claim 10 , comprising a fourth oxide layer in contact with a top surface of the second oxide layer,
wherein the fourth oxide layer contains one or more kinds of metal elements which are the same as metal elements contained in the second oxide layer.

17. The semiconductor device according to claim 16 , wherein electron affinity of the fourth oxide layer is smaller than electron affinity of the second oxide layer.

18. The semiconductor device according to claim 10 ,
wherein the first source electrode and the first drain electrode comprises a first material, and the second source electrode and the second drain electrode comprises a second material, and
wherein the first material has a lower oxidation potential than the second material.

19. The semiconductor device according to claim 10 , wherein the gate insulating layer comprises a hafnium oxide film.

20. The semiconductor device according to claim 10 , wherein the gate insulating layer comprises an aluminum oxide film.

21. The semiconductor device according to claim 10 , comprising a protective insulating layer over the gate electrode,
wherein the gate insulating layer comprises a silicon oxide film or a silicon oxynitride film, and
wherein the protective insulating layer comprises a silicon nitride film or an aluminum oxide film.

22. A semiconductor device comprising:
an insulating layer containing oxygen;
a first oxide layer in contact with a top surface of the insulating layer;
an oxide semiconductor layer which is over the first oxide layer and in which a channel is formed;
a first source electrode and a first drain electrode in contact with a top surface of the oxide semiconductor layer;
a second oxide layer over the first source electrode and the first drain electrode;
a second source electrode and a second drain electrode over the second oxide layer;
a gate insulating layer over the second source electrode, the second drain electrode, and the second oxide layer; and
a gate electrode over the gate insulating layer,
wherein the second source electrode is electrically connected to the first source electrode, and
wherein the second drain electrode is electrically connected to the first drain electrode.

23. The semiconductor device according to claim 22 , comprising a region where the insulating layer is in contact with the second oxide layer outside the oxide semiconductor layer.

24. The semiconductor device according to claim 22 , comprising a third oxide layer between the insulating layer and the first oxide layer,
wherein the third oxide layer contains one or more kinds of metal elem

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Matsuda Shinpei
• Oota Masashi
• Ishihara Noritaka

Classifications

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D64/691

  comprising metallic compounds, e.g. metal oxides or metal silicates  (insulators comprising nitrogen H10D64/693) · CPC title

• H10D64/62

  Electrodes ohmically coupled to a semiconductor · CPC title

• H10D30/6756

  Amorphous oxide semiconductors · CPC title

• H10D30/6729

  characterised by the electrodes · CPC title