Double blade dicing of lithium-containing photonics devices

US12487402B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12487402-B2
Application numberUS-202418817075-A
CountryUS
Kind codeB2
Filing dateAug 27, 2024
Priority dateSep 5, 2023
Publication dateDec 2, 2025
Grant dateDec 2, 2025

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A singulated thin film lithium containing (TFLC) photonics device, as well as a method and system for singulating the device are described. The TFLC photonics device includes a device layer and a silicon substrate. The device layer includes a TFLC layer having a depth. The device layer also has a first sawn edge. The silicon substrate has a second sawn edge and includes an upper portion and a lower portion. The upper portion has the second sawn edge that is mutually aligned with the first sawn edge. The upper portion overhangs the lower portion.

First claim

Opening claim text (preview).

What is claimed is: 1 . A singulated thin film lithium containing (TFLC) photonics device comprising: a device layer including a TFLC layer having a depth, the device layer having a first sawn edge, the first sawn edge having a root mean square (RMS) surface roughness not exceeding eighty nanometers and an insertion loss for an optical structure including at least a portion of the TFLC layer of not more than 2.5 dB per facet; a silicon substrate having a second sawn edge and including: an upper portion having the second sawn edge that is mutually aligned with the first sawn edge; and a lower portion wherein the upper portion overhangs the lower portion; and a passivation layer deposited on the first sawn edge before the second sawn edge is formed, wherein the passivation layer separates the TFLC photonics device from a fiber array unit, and wherein the TFLC photonics device is mounted to the fiber array unit. 2 . The singulated TFLC photonics device of claim 1 , wherein the first sawn edge and the second sawn edge are part of a single sawn edge. 3 . The singulated TFLC photonics device of claim 1 , wherein the upper portion overhangs the lower portion by at least five micrometers and not more than thirty micrometers. 4 . The singulated TFLC photonics device of claim 3 , wherein the upper portion overhangs the lower portion by at least ten micrometers and not more than twenty micrometers. 5 . The singulated TFLC photonics device of claim 1 , wherein the lower portion has a third sawn edge. 6 . The singulated TFLC photonics device of claim 1 , wherein a portion of the passivation layer is on the upper portion of the silicon substrate. 7 . The singulated TFLC photonics device of claim 1 , wherein the first sawn edge has an optical insertion loss of not more than 1.5 dB. 8 . The singulated TFLC photonics device of claim 1 , wherein the TFLC layer includes a waveguide. 9 . The singulated TFLC photonics device of claim 1 , wherein the TFLC layer includes a waveguide terminating at a working distance from the first sawn edge, the working distance being at least one hundred nanometers. 10 . A dicing system, comprising: a frame supporting a wafer having a thin film lithium-containing (TFLC) layer at a depth and a silicon substrate; a blade oriented to produce a cut through a surface of the wafer such that the cut extends through the depth of the TFLC layer into the silicon substrate but does not extend all the way through the silicon substrate such that a groove is formed; a motor that rotates the blade at a nominal revolutions per minute (rpm); and a delivery module that deposits a passivation layer on a surface of the groove; wherein the dicing system is configured to form the cut such that a first sawn edge including the TFLC layer has a root mean square (RMS) surface roughness not exceeding eighty nanometers and an insertion loss for an optical structure including at least a portion of the TFLC layer of not more than 2.5 dB per facet, wherein an additional blade is oriented to produce an additional cut through a back surface of the silicon substrate such that the additional cut intersects the groove, wherein the passivation layer is deposited on the first sawn edge before the additional cut is produced, wherein the wafer is mounted to a fiber array unit, and wherein the passivation layer separates the wafer from the fiber array unit. 11 . The dicing system of claim 10 , wherein the blade is dressed by the silicon substrate as it cuts through the depth of the TFLC layer. 12 . The dicing system of claim 10 , wherein the nominal rpm is at least 20 kilo-rpm (krpm) and not more than 40 krpm. 13 . The dicing system of claim 12 , wherein the nominal rpm is at least 25 krpm and not more than 35 krpm. 14 . The dicing system of claim 10 , wherein the cut corresponds to a feed speed of at least 4 millimeters per second and not more than 15 millimeters per second. 15 . The dicing system of claim 10 , wherein the blade includes Ni and is not more than 13 micrometers thick. 16 . The dicing system of claim 10 , wherein the groove has a surface roughness not exceeding five hundred nanometers. 17 . The dicing system of claim 10 , wherein the dicing system is configured to form the cut by the blade at a feed speed of at least 4 millimeters per second and not more than 10 millimeters per second and the nominal rpm of at least 20 krpm and not more than 35 krpm such that the first sawn edge including the TFLC layer has the RMS surface roughness not exceeding eighty nanometers and an insertion loss for an optical structure including at least a portion of the TFLC layer of not more than 2.5 dB per facet. 18 . A method for singulating a thin film lithium containing (TFLC) photonics device from a wafer, the method comprising: supporting the wafer in a frame, the wafer including a device layer having a TFLC layer at a depth and a silicon substrate, cutting, using a blade, through a surface of the wafer to produce a cut such that the cut extends through the depth of the TFLC layer into the silicon substrate but does not extend all the way through the silicon substrate such that a groove having a first sawn edge is formed, the blade rotating at a nominal revolutions per minute (rpm) for the cutting, the cutting further including: forming the cut such that the first sawn edge has a root mean square surface roughness not exceeding eighty nanometers and an insertion loss for an optical structure including at least a portion of the TFLC layer of not more than 2.5 dB per facet; and depositing a passivation layer on the groove, wherein the passivation layer is on the first sawn edge; an additional cutting, using an additional blade, through a back surface of the silicon substrate to produce an additional cut that intersects the groove, the additional blade rotating at an additional nominal rpm for the additional cutting, wherein the depositing of the passivation layer on the groove is performed before the additional cutting; and mounting the TFLC photonics device to a fiber array unit, wherein the passivation layer separates the TFLC photonics device from the fiber array unit.

Assignees

Inventors

Classifications

  • Preparing the ends of light guides for coupling, e.g. cutting · CPC title

  • Ridge, rib or the like · CPC title

  • by etching · CPC title

  • for use between fibre and thin-film device · CPC title

  • G02B6/13Primary

    Integrated optical circuits characterised by the manufacturing method · CPC title

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Frequently asked questions

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What does patent US12487402B2 cover?
A singulated thin film lithium containing (TFLC) photonics device, as well as a method and system for singulating the device are described. The TFLC photonics device includes a device layer and a silicon substrate. The device layer includes a TFLC layer having a depth. The device layer also has a first sawn edge. The silicon substrate has a second sawn edge and includes an upper portion and a l…
Who is the assignee on this patent?
Hyperlight Corp
What technology area does this patent fall under?
Primary CPC classification G02B6/13. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 02 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).