Optical integrated circuit and manufacturing method thereof

US9435949B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9435949-B2
Application numberUS-201514661638-A
CountryUS
Kind codeB2
Filing dateMar 18, 2015
Priority dateMar 25, 2014
Publication dateSep 6, 2016
Grant dateSep 6, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An optical integrated circuit formed on a substrate includes a light source, a spot size converter section configured to convert a spot size of light emitted from the light source, a waveguide section connected to the spot size converter section, and an active section connected to the waveguide section, layers sequentially a lower clad layer, core layer, shared layer, and upper clad layer on the substrate, makes a refractive index of the shared layer greater than refractive indices of the lower clad layer and upper clad layer and less than a refractive index of the core layer, and makes the spot size converter section, the waveguide section, and the active section share the shared layer. Accordingly, it is possible to provide an optoelectric integrated circuit by which both a simplification in a manufacturing process and a high efficiency in optical coupling between a light source and a waveguide are achieved.

First claim

Opening claim text (preview).

The invention claimed is: 1. An optical integrated circuit formed on a substrate, comprising: a light source; a spot size converter section configured to convert a spot size of light emitted from the light source; a waveguide section connected to the spot size converter section; and an active section connected to the waveguide section, wherein, on the substrate, a lower clad layer, a core layer, a shared layer, and an upper clad layer are sequentially layered, a refractive index of the shared layer is greater than refractive indices of the lower clad layer and the upper clad layer and less than a refractive index of the core layer, and the spot size converter section, the waveguide section, and the active section share the shared layer. 2. The optical integrated circuit according to claim 1 , wherein the shared layer is a core of the spot size converter section, an upper clad of the waveguide section, and an interlayer insulating layer of the active section, respectively. 3. The optical integrated circuit according to claim 1 , wherein the shared layer is continuously formed across the spot size converter section, the waveguide section, and the active section. 4. The optical integrated circuit according to claim 1 , wherein the light source is a light emitting element. 5. The optical integrated circuit according to claim 4 , wherein the light emitting element is mounted on pedestals by adjusting a height of upper surface of the pedestals in a light element mounting section. 6. The optical integrated circuit according to claim 4 , where in the light emitting element is semiconductor laser. 7. The optical integrated circuit according to claim 6 , wherein an optical axis of an active layer included in the semiconductor laser aligns with an optical axis of a core of the shared layer included in the spot size converter section. 8. The optical integrated circuit according to claim 1 , wherein the spot size converter section includes a tapered core of which the width or the thickness monotonically increases or decreases along a light propagation direction, the tapered core being configured with the core layer. 9. The optical integrated circuit according to claim 8 , wherein the spot size converter section includes, on the tapered core, a core configured with the shared layer or a slab layer configured with the shared layer. 10. The optical integrated circuit according to claim 1 , wherein the active section is a modulator or a photodetector. 11. The optical integrated circuit according to claim 1 , wherein another spot size converter is formed around the output end face of the waveguide section to connect an optical fiber. 12. The optical integrated circuit according to claim 1 , wherein the shared layer includes at least a material chosen from SiO X , SiON, and HfO 2 , which have a higher refractive index than SiO 2 , the lower clad layer and the upper clad layer include SiO 2 , and the core layer includes Si. 13. An optical integrated circuit formed on a substrate, comprising: a light source; a spot size converter section configured to convert a spot size of light emitted from the light source; a waveguide section connected to the spot size converter section; and an active section connected to the waveguide section, the optical integrated circuit further comprising a shared layer on the substrate, wherein the shared layer functions as a core for the spot size converter section, as an upper clad for the waveguide section, and as an interlayer insulating layer for the active section, respectively.

Assignees

Inventors

Classifications

  • the optical waveguides being made of semiconducting material · CPC title

  • G02B6/1228Primary

    Tapered waveguides, e.g. integrated spot-size transformers (for coupling with fibres G02B6/305) · CPC title

  • in an optical waveguide structure (G02F1/017, {G02F1/2257} take precedence) · CPC title

  • Combinations of two or more optical elements · CPC title

  • single crystal Si · CPC title

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What does patent US9435949B2 cover?
An optical integrated circuit formed on a substrate includes a light source, a spot size converter section configured to convert a spot size of light emitted from the light source, a waveguide section connected to the spot size converter section, and an active section connected to the waveguide section, layers sequentially a lower clad layer, core layer, shared layer, and upper clad layer on th…
Who is the assignee on this patent?
Nec Corp
What technology area does this patent fall under?
Primary CPC classification G02B6/1228. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).