Optically bridged multicomponent package with extended temperature range

US12468103B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12468103-B2
Application numberUS-202519170641-A
CountryUS
Kind codeB2
Filing dateApr 4, 2025
Priority dateMar 18, 2022
Publication dateNov 11, 2025
Grant dateNov 11, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is electrically connected to the first modulator input via the EIC interconnect region, a first metal interconnect, and the PIC interconnect region. The modulator receives a temperature-dependent bias voltage, where the temperature dependence of the bias voltage inversely matches the temperature dependence of the modulator across an extended temperature range.

First claim

Opening claim text (preview).

What is claimed is: 1 . A bridging apparatus for optically joining a first die and a second die, comprising: a bridge; and one or more analog/mixed signal (AMS) blocks disposed on the bridge, the one or more AMS blocks each including a respective serializer and deserializer for implementing data serialization and deserialization interfaces between the bridge and the first and second dies to be joined by the bridge, wherein corresponding AMS blocks are respectively connectable to each of the first and second dies to be joined by the bridge using electrical interfaces supporting a communication protocol; the bridge comprising: a photonic network comprising a photonic path; a waveguide, the waveguide being part of the photonic path in the photonic network; a modulator, the modulator being optically coupled to the photonic path and electrically coupled to a corresponding AMS block; a photodetector, the photodetector being optically coupled to the photonic path and electrically coupled to a corresponding AMS block; and an edge coupler, the edge coupler being optically coupled to the photonic network and the edge coupler providing an optical interface couplable to one or more optical fibers, wherein the bridging apparatus provides a photonic channel for connecting the first and second dies to be joined by the bridge, the photonic channel comprising a serializer, the modulator, the photonic path, the photodetector, and a deserializer, wherein the photonic channel is part of a data communication path provided for the first and second dies. 2 . The bridging apparatus of claim 1 , wherein the bridge further comprises a first interconnect region having bondpads arranged in a first bondpad pattern matching with bondpads arranged in a first corresponding bondpad pattern on the first die, and second interconnect region having bondpads arranged in a second bondpad pattern matching with bondpads arranged in a second corresponding bondpad pattern on the second die. 3 . The bridging apparatus of claim 1 , wherein the bridge further comprises an electrical inter-connection providing a signal path between a corresponding AMS block and the first or second die, when joined by the bridge. 4 . The bridging apparatus of claim 1 , further comprising the first and second dies, the first and second dies being bonded and electrically coupled to the bridge. 5 . The bridging apparatus of claim 1 , wherein the first and second dies are each electrically connected to respective AMS blocks through electrical paths in the bridge. 6 . The bridging apparatus of claim 1 , further comprising the first and second dies and a first and a second AMS block, wherein the first and second AMS blocks are bonded and electrically coupled to the first die and the second die respectively. 7 . The bridging apparatus of claim 4 , wherein the first and second AMS blocks abut the first die and the second die respectively. 8 . The bridging apparatus of claim 4 , wherein the first and second die each have a respective central region, and the first and the second AMS blocks are bonded to the respective central regions of the first die and second die. 9 . The bridging apparatus of claim 8 , wherein a compute element is disposed around the central region of the first die. 10 . The bridging apparatus of claim 8 , wherein a memory region is disposed around the central region of the first die. 11 . The bridging apparatus of claim 1 , further comprising a light engine, the light engine being external to the bridge and optically coupled to the one or more optical fibers, the light engine providing optical signals for transmission on the photonic network to the modulator. 12 . The bridging apparatus of claim 1 , further comprising a light engine integrated with the bridge and optically coupled to the modulator. 13 . The bridging apparatus of claim 12 , wherein the modulator is configured to modulate the optical signals provided by the light engine. 14 . The bridging apparatus of claim 1 , further comprising a modulator driver that is a part of the bridge, wherein a corresponding AMS block is operable to provide a control signal to the modulator driver. 15 . The bridging apparatus of claim 1 , wherein the one or more AMS blocks are abutted to the bridge at a distance less than 50 microns. 16 . The bridging apparatus of claim 1 , wherein the communication protocol is UCIe (Universal Chiplet Interconnect Express) or PCIe (Peripheral Component Interconnect Express). 17 . The bridging apparatus of claim 1 , wherein the modulator comprises one or more of Mach-Zehnder interferometer, ring modulator, or micro-ring resonator. 18 . The bridging apparatus of claim 17 , wherein the bridge further comprises a multiplexer and a demultiplexer, the multiplexer being optical coupled through the photonic network to the modulator, and further optically coupled through the photonic network to provide signals to an optical interface, wherein the multiplexer is configured to perform wavelength division multiplexing (WDM), and the demultiplexer being optically coupled through the photonic network to the photodetector, and further optically coupled through the photonic network to receive signals from the optical interface, wherein the demultiplexer is configured to demultiplex WDM-multiplexed signals. 19 . The bridging apparatus of claim 18 , further comprising a second modulator in the bridge, the second modulator optically coupled to the photonic path and electrically coupled to a corresponding AMS block, and wherein the multiplexer receives modulated signals from both the modulator and the second modulator. 20 . The bridging apparatus of claim 1 , wherein the bridge is a photonic integrated circuit. 21 . The bridging apparatus of claim 1 , wherein the modulator comprises a Mach-Zehnder interferometer in combination with a micro-ring resonator.

Assignees

Inventors

Classifications

  • provided with specially adapted connectors (connectors per se H01R) · CPC title

  • G02F1/0123Primary

    Circuits for the control or stabilisation of the bias voltage, e.g. automatic bias control [ABC] feedback loops · CPC title

  • using electro-absorption effects, e.g. Franz-Keldysh [FK] effect or quantum confined stark effect [QCSE] · CPC title

  • Arrangements for modifying the output characteristic, e.g. linearising · CPC title

  • using microstructures, e.g. made of silicon · CPC title

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Frequently asked questions

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What does patent US12468103B2 cover?
A package comprises a photonic integrated circuit (PIC) with a modulator having a first modulator input, and a PIC interconnect region within two millimeters or fifty microns from the modulator. Additionally, an electric integrated circuit (EIC) is included with a driver circuit and an EIC interconnect region within two millimeters or fifty microns from the driver circuit. The driver circuit is…
Who is the assignee on this patent?
Celestial Ai Inc
What technology area does this patent fall under?
Primary CPC classification G02F1/0123. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 11 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).