Hybrid integrated photonic chip package

Patent metadata

Field	Value
Publication number	US-9256026-B2
Application number	US-201414540651-A
Country	US
Kind code	B2
Filing date	Nov 13, 2014
Priority date	Oct 7, 2013
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each other on the same side of a substrate in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. In addition, an input/output (I/O) integrated circuit is coupled to the optical integrated circuit between the substrate and the optical integrated circuit. This I/O integrated circuit includes high-speed I/O circuits and energy-efficient driver and receiver circuits and communicates with optical devices on the optical integrated circuit. By integrating the optical integrated circuit, the integrated circuit and the I/O integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.

First claim

What is claimed is:

1. A chip package, comprising:
an integrated circuit having a first surface with first integrated-circuit connector pads and second integrated circuit connector pads;
optical-integrated-circuit electrical connectors electrically coupled to the first integrated circuit connector pads;
an optical integrated circuit having a front surface, facing the first surface of the integrated circuit, with optical-integrated-circuit connector pads electrically coupled to the optical-integrated-circuit electrical connectors, wherein the optical integrated circuit is configured to communicate optical signals;
substrate electrical connectors electrically coupled to the second integrated-circuit connector pads;
a substrate having a front surface facing the first surface of the integrated circuit, with substrate connector pads electrically coupled to the substrate electrical connectors;
wherein the substrate further includes, ramp-stack connector pads disposed on a back surface of the substrate on an opposite side of the substrate from the front surface, through-substrate vias (TSVs) electrically coupling the substrate connector pads to the ramp-stack connector pads,

ramp-stack electrical connectors electrically coupled to the ramp-stack connector pads, and a ramp-stack chip package electrically coupled to the ramp-stack electrical connectors, wherein the ramp-stack chip package includes multiple parallel substrates arranged at an oblique angle relative to the substrate.

2. The chip package of claim 1 , wherein the chip package further includes an optical fiber edge coupled to the optical integrated circuit.

3. The chip package of claim 1 , wherein the chip package further includes an optical fiber vertically coupled to the optical integrated circuit.

4. The chip package of claim 1 , wherein the optical fiber is coupled to the front surface of the optical integrated circuit.

5. The chip package of claim 1 , wherein the optical fiber is coupled to a back surface of the optical integrated circuit on an opposite side of the optical integrated circuit from the front surface of the optical integrated circuit.

6. The chip package of claim 1 , wherein the chip package further includes an optical source that is optically coupled to the optical integrated circuit.

7. The chip package of claim 1 , wherein the substrate includes one of: a ceramic, an organic material, a glass, and a semiconductor.

8. A chip package, comprising:
an integrated circuit having a top surface with integrated-circuit connector pads;
integrated-circuit electrical connectors electrically coupled to the integrated-circuit connector pads;
an optical integrated circuit having a front surface, facing the top surface of the integrated circuit, with first optical-integrated-circuit connector pads electrically coupled to the integrated-circuit electrical connectors, and with second optical-integrated-circuit connector pads electrically coupled to substrate electrical connectors, wherein the optical integrated circuit is configured to communicate optical signals; and
a substrate having a top surface, facing the optical integrated circuit, with substrate connector pads electrically coupled to the substrate electrical connectors; wherein the optical integrated circuit further includes, ramp-stack connector pads disposed on a back surface of the optical integrated circuit on an opposite side of the optical integrated circuit from the front surface of the optical integrated circuit,
through-substrate vias (TSVs) electrically coupling the first and second optical-integrated-circuit connector pads to the ramp-stack connector pads, ramp-stack electrical connectors electrically coupled to the ramp-stack connector pads, and
a ramp-stack chip package electrically coupled to the ramp-stack electrical connectors, wherein the ramp-stack chip package includes multiple parallel substrates arranged at an oblique angle relative to the back surface.

9. The chip package of claim 8 , wherein the chip package further includes an optical fiber edge coupled to the optical integrated circuit.

10. The chip package of claim 8 , wherein the chip package further includes an optical fiber vertically coupled to the optical integrated circuit.

11. The chip package of claim 10 , wherein the optical fiber is coupled to the front surface of the optical integrated circuit.

12. The chip package of claim 10 , wherein the optical fiber is coupled to the back surface of the optical integrated circuit.

13. The chip package of claim 8 , wherein the chip package further includes an optical source that is optically coupled to the optical integrated circuit.

14. The chip package of claim 8 , wherein the substrate includes one of: a ceramic, an organic material, a glass, and a semiconductor.

15. A chip package, comprising:
an integrated circuit having a top surface with first and second integrated-circuit connector pads;
first integrated-circuit electrical connectors electrically coupled to the first integrated-circuit connector pads;
second integrated-circuit electrical connectors electrically coupled to the second integrated-circuit connector pads;
an optical integrated circuit having a front surface facing the top surface of the integrated circuit, with optical-integrated-circuit connector pads electrically coupled to the first integrated-circuit electrical connectors, wherein the optical integrated circuit is configured to communicate optical signals;
an interposer having a front surface facing the top surface of the integrated circuit, with first interposer connector pads electrically coupled to the second integrated-circuit electrical connectors, and with second interposer connector pads;
a substrate having a top surface, facing the front surface of the interposer, with substrate connector pads electrically coupled to substrate electrical connectors that are electrically coupled to the second interposer connector pads;
wherein the interposer further includes, ramp-stack connector pads disposed on a back surface of the interposer on an opposite side of the interposer from the front surface of the interposer, through-substrate vias (TSVs) electrically coupling the first and second interposer connector pads to the ramp-stack connector pads, ramp-stack electrical connectors electrically coupled to the ramp-stack connector pads, and a ramp-stack chip package electrically coupled to the ramp-stack electrical connectors, wherein the ramp-stack chip package includes multiple parallel substrates arranged at an oblique angle relative to the back surface.

16. The chip package of claim 15 , wherein the chip package further includes an optical fiber edge coupled to the optical integrated circuit.

17. The chip package of claim 15 , wherein the chip package further includes an optical fiber vertically coupled to the optical integrated circuit.

18. The chip package of claim 17 , wherein the optical fiber is coupled to the front surface of the optical integrated circuit.

19. The chip package of claim 17 , wherein the optical fiber is coupled to a back surface of the optical integrated circuit on an opposite side of the optical integrated circuit from the front surface of the optical integrated circuit.

20. The chip package of claim 15 , wherein the chip package further includes an optical source that is optically coupled to the optical integrated circuit.

Assignees

• Oracle Int Corp

Inventors

• Thacker Hiren D
• Krishnamoorthy Ashok V
• Hopkins Ii Robert David
• Lexau Jon
• Ho Ronald
• Cunningham John E

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W90/295

  optical coupling · CPC title

• H10W90/26

  the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape · CPC title

• H10W72/07252

  changes in structures or sizes · CPC title