Semiconductor device and method of forming SiP module absent substrate

Patent metadata

Field	Value
Publication number	US-12444620-B2
Application number	US-202217661747-A
Country	US
Kind code	B2
Filing date	May 2, 2022
Priority date	May 2, 2022
Publication date	Oct 14, 2025
Grant date	Oct 14, 2025

Abstract

A semiconductor device has a sacrificial substrate and an electrical component disposed over the sacrificial substrate. A bump stop layer is formed within the sacrificial substrate. At least a portion of the bump or terminal of the electrical component is embedded into the sacrificial substrate to contact the bump stop layer. An encapsulant is deposited over the electrical component and sacrificial substrate. A channel is formed through the encapsulant and partially into the sacrificial substrate. The sacrificial substrate is removed to leave a bump or terminal of the electrical component extending out from the encapsulant. A thickness of the semiconductor device is determined by a thickness of the encapsulant and bump extending out from the encapsulant. A portion of the encapsulant can be removed to reduce the thickness of the semiconductor device. A conductive paste can be deposited over the bump or terminal extending out from the encapsulant.

First claim

What is claimed:

1. A method of making a semiconductor device, comprising:
providing a sacrificial substrate including a bump stop layer;
disposing an electrical component over the sacrificial substrate with a bump of the electrical component penetrating the sacrificial substrate and stopping the penetration by contacting the bump stop layer;
depositing an encapsulant over the electrical component and sacrificial substrate; and
removing the sacrificial substrate to leave the bump of the electrical component extending out from the encapsulant.

2. The method of claim 1 , further including forming the bump stop layer within the sacrificial substrate.

3. The method of claim 1 , further including embedding at least a portion of the bump of the electrical component into the sacrificial substrate.

4. The method of claim 1 , further including forming a channel through the encapsulant and partially into the sacrificial substrate.

5. The method of claim 1 , wherein a thickness of the semiconductor device is determined by a thickness of the encapsulant and bump extending out from the encapsulant.

6. The method of claim 1 , further including removing a portion of the encapsulant.

7. The method of claim 1 , further including:
forming the bump stop layer over the sacrificial substrate; and
forming a penetrable layer over the bump stop layer and sacrificial substrate.

8. A method of making a semiconductor device, comprising:
providing a substrate including a stop layer;
disposing an electrical component over the substrate with a terminal of the electrical component at least partially embedded in the substrate and contacting the stop layer;
depositing an encapsulant over the electrical component and substrate; and
removing the substrate to leave the terminal of the electrical component exposed from the encapsulant.

9. The method of claim 8 , further including forming the stop layer within the substrate.

10. The method of claim 8 , further including:
forming the stop layer over the substrate; and
forming a penetrable layer over the stop layer and substrate.

11. The method of claim 8 , further including forming a channel through the encapsulant and partially into the substrate.

12. The method of claim 8 , wherein a thickness of the semiconductor device is determined by a thickness of the encapsulant and terminal.

13. The method of claim 8 , further including removing a portion of the encapsulant.

14. The method of claim 8 , further including depositing a conductive paste over the terminal exposed from the encapsulant.

15. A method of making a semiconductor device, comprising:
providing a substrate including a stop layer;
disposing an electrical component over the substrate with a terminal of the electrical component penetrating the substrate and contacting the stop layer;
depositing an encapsulant over the electrical component and substrate; and
removing the substrate to leave a terminal of the electrical component extending out from the encapsulant.

16. The method of claim 15 , further including forming the stop layer within the substrate.

17. The method of claim 15 , further including:
forming the stop layer over the substrate; and
forming a penetrable layer over the stop layer and substrate.

18. The method of claim 15 , further including forming a channel through the encapsulant and partially into the substrate.

19. The method of claim 15 , wherein a thickness of the semiconductor device is determined by a thickness of the encapsulant and terminal extending out from the encapsulant.

20. The method of claim 15 , further including removing a portion of the encapsulant.

21. The method of claim 15 , wherein the electrical component includes a semiconductor die or a discrete semiconductor device.

22. A method of making a semiconductor device, comprising:
providing a substrate including a stop layer;
providing an electrical component with a terminal of the electrical component penetrating the substrate and contacting the stop layer;
depositing an encapsulant over the electrical component and substrate; and
removing the substrate to leave a terminal of the electrical component extending out from the encapsulant, wherein a thickness of the semiconductor device is determined by a thickness of the encapsulant and the terminal extending out from the encapsulant.

23. The method of claim 22 , further including depositing the encapsulant over a plurality of electrical components.

24. The method of claim 22 , further including forming a channel through the encapsulant.

25. The method of claim 22 , further including depositing a conductive paste over the terminal.

26. The method of claim 22 , wherein the electrical component includes a semiconductor die or a discrete semiconductor device.

27. The method of claim 22 , further including forming the stop layer within the substrate.

28. The method of claim 22 , further including:
forming the stop layer over the substrate; and
forming a penetrable layer over the stop layer and substrate.

Assignees

• Stats Chippac Pte Ltd

Inventors

• Kwon Jieun
• Moon Jisik
• Lee Kicheol
• Lim Bolee

Classifications

• H10W90/00

  Package configurations · CPC title

• H10W72/0198 Primary

  batch processes · CPC title

• H10W74/111

  the semiconductor body being completely enclosed · CPC title

• H10W74/014 Primary

  using batch processing · CPC title

• H10W74/129

  forming a chip-scale package [CSP] · CPC title