Semiconductor Device and Method of Bonding Semiconductor Die to Substrate in Reconstituted Wafer Form

US2016163675A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016163675-A1
Application numberUS-201615012346-A
CountryUS
Kind codeA1
Filing dateFeb 1, 2016
Priority dateDec 20, 2012
Publication dateJun 9, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device has a plurality of semiconductor die disposed over a carrier. An electrical interconnect, such as a stud bump, is formed over the semiconductor die. The stud bumps are trimmed to a uniform height. A substrate includes a bump over the substrate. The electrical interconnect of the semiconductor die is bonded to the bumps of the substrate while the semiconductor die is disposed over the carrier. An underfill material is deposited between the semiconductor die and substrate. Alternatively, an encapsulant is deposited over the semiconductor die and substrate using a chase mold. The bonding of stud bumps of the semiconductor die to bumps of the substrate is performed using gang reflow or thermocompression while the semiconductor die are in reconstituted wafer form and attached to the carrier to provide a high throughput of the flipchip type interconnect to the substrate.

First claim

Opening claim text (preview).

What is claimed: 1 . A method of making a semiconductor device, comprising: providing a reconstituted panel including a plurality of semiconductor die; disposing the reconstituted panel over a substrate; and bonding the semiconductor die to the substrate. 2 . The method of claim 1 , further including forming an interconnect structure over the semiconductor die, wherein bonding the semiconductor die to the substrate further includes bonding the interconnect structure to the substrate. 3 . The method of claim 2 , wherein the interconnect structure includes a bump or a stud bump. 4 . The method of claim 1 , further including simultaneously bonding the semiconductor die to the substrate by thermocompression bonding. 5 . The method of claim 1 , further including depositing an encapsulant or underfill material between the semiconductor die and substrate. 6 . The method of claim 1 , further including singulating the substrate after bonding the semiconductor die to the substrate. 7 . A method of making a semiconductor device, comprising: providing a reconstituted panel including a plurality of semiconductor die; forming a first interconnect structure over the semiconductor die; and disposing the reconstituted panel over a substrate. 8 . The method of claim 7 , further including: forming a second interconnect structure over the substrate; and bonding the first interconnect structure to the second interconnect structure. 9 . The method of claim 7 , wherein providing the reconstituted panel further includes: providing a carrier; and disposing the semiconductor die over the carrier. 10 . The method of claim 9 , further including forming the first interconnect structure over the semiconductor die while the semiconductor die are disposed over the carrier. 11 . The method of claim 9 , further including bonding the first interconnect structure to the substrate while the semiconductor die are disposed over the carrier. 12 . The method of claim 7 , further including bonding the first interconnect structure to the substrate using thermocompression. 13 . The method of claim 7 , further including depositing an encapsulant or an underfill material between the semiconductor die and substrate. 14 . A semiconductor device, comprising: a substrate; a reconstituted panel including a plurality of semiconductor die disposed over the substrate; and a first interconnect structure formed between the substrate and the semiconductor die with the first interconnect structure bonded to the substrate and the semiconductor die of the reconstituted panel. 15 . The semiconductor device of claim 14 , wherein the first interconnect structure includes a bump or a stud bump. 16 . The semiconductor device of claim 14 , further including a second interconnect structure formed over the substrate with the first interconnect structure bonded to the second interconnect structure. 17 . The semiconductor device of claim 14 , wherein the reconstituted panel further includes the semiconductor die disposed over a carrier. 18 . The semiconductor device of claim 14 , wherein the substrate includes a printed circuit board. 19 . The semiconductor device of claim 14 , further including an encapsulant or an underfill material deposited between the semiconductor die and substrate. 20 . A semiconductor device, comprising: a substrate; and a reconstituted panel including a plurality of semiconductor die disposed over the substrate with the semiconductor die on the reconstituted panel bonded to the substrate. 21 . The semiconductor device of claim 20 , wherein the reconstituted panel further includes the semiconductor die disposed over a carrier. 22 . The semiconductor device of claim 20 , further including an interconnect structure formed over the semiconductor die of the reconstituted panel, the interconnect structure bonded to the substrate. 23 . The semiconductor device of claim 22 , wherein the interconnect structure includes a bump or a stud bump. 24 . The semiconductor device of claim 20 , wherein the substrate includes a printed circuit board. 25 . The semiconductor device of claim 20 , further including an encapsulant or underfill material deposited between the semiconductor die and substrate.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • the encapsulations exposing the passive side of the semiconductor body · CPC title

  • the substrate having spherical bumps for external connection · CPC title

  • using moulds · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

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Frequently asked questions

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What does patent US2016163675A1 cover?
A semiconductor device has a plurality of semiconductor die disposed over a carrier. An electrical interconnect, such as a stud bump, is formed over the semiconductor die. The stud bumps are trimmed to a uniform height. A substrate includes a bump over the substrate. The electrical interconnect of the semiconductor die is bonded to the bumps of the substrate while the semiconductor die is dispo…
Who is the assignee on this patent?
Stats Chippac Ltd
What technology area does this patent fall under?
Primary CPC classification H10W74/014. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jun 09 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).