Printed circuit board

Patent metadata

Field	Value
Publication number	US-12439512-B2
Application number	US-202117469147-A
Country	US
Kind code	B2
Filing date	Sep 8, 2021
Priority date	Mar 31, 2021
Publication date	Oct 7, 2025
Grant date	Oct 7, 2025

Abstract

A printed circuit board includes a first insulating layer, a first conductor-pattern layer disposed on one surface of the first insulating layer, a first recess formed in the other surface of the first insulating layer opposing one surface of the first insulating layer, a second conductor-pattern layer disposed in the first recess, and a first metal post penetrating the first insulating layer, connecting the first and second conductor-pattern layers to each other, and having one end exposed to a bottom surface of the first recess, wherein the second conductor-pattern layer includes a seed layer disposed on at least a portion of each of a surface of one end of the first metal post exposed to the bottom surface of the first recess and an internal surface of the first recess including the bottom surface of the first recess, and a plating layer disposed on the seed layer to fill at least a portion of the first recess.

First claim

What is claimed is:

1. A printed circuit board, comprising:
a first insulating layer;
a first conductor-pattern layer disposed on a first surface of the first insulating layer;
a first recess disposed in a second surface of the first insulating layer opposing the first surface of the first insulating layer;
a second conductor-pattern layer disposed in the first recess;
a first metal post penetrating the first insulating layer, connecting the first and second conductor-pattern layers to each other, and having one end exposed to a bottom surface of the first recess;
a second insulating layer having one surface in contact with the second surface of the first insulating layer;
a second recess disposed in another surface of the second insulating layer opposing the one surface of the second insulating layer;
a third conductor-pattern layer disposed in the second recess;
a second metal post penetrating the second insulating layer and connecting the second and third conductor-pattern layers to each other;
a solder resist disposed on the second insulating layer and having an opening to expose a portion of the third conductor-pattern layer;
a third insulating layer disposed on an opposing side of the first insulating layer with respect to the second insulating layer such that the first insulating layer is disposed between the second insulating layer and the third insulating layer;
a fourth conductor-pattern layer disposed on a first surface of the third insulating layer;
a third recess disposed in a second surface of the third insulating layer opposing the first surface of the third insulating layer;
a fifth conductor-pattern layer disposed in the third recess; and
a third metal post penetrating the third insulating layer, connecting the fourth and fifth conductor-pattern layers to each other, and having one end protruding from a bottom surface of the third recess towards the second insulating layer,
wherein the first and second insulating layer have the same material, and
wherein an upper surface of the first metal post does not extend in an upward direction beyond a lower surface of the second conductor-pattern layer disposed in the first recess.

2. The printed circuit board of claim 1 , wherein, in the first insulating layer, a region in which the second conductor-pattern layer is disposed and a region in which the first metal post is disposed are integrated with each other.

3. The printed circuit board of claim 1 , wherein a partial region of the fifth conductor-pattern layer has a cross-sectional area decreasing in a direction from the second surface of the third insulating layer toward the first surface of the third insulating layer.

4. The printed circuit board of claim 3 , wherein the partial region of the fifth conductor-pattern layer is disposed more adjacent to the third metal post than the other region of the fifth conductor-pattern layer.

5. The printed circuit board of claim 3 , wherein the one end of the third metal post protrudes from the bottom surface of the third recess.

6. The printed circuit board of claim 5 , further comprising a seed layer disposed on at least a portion of each of an upper surface of the one end of the third metal post, a side surface of the one end of the third metal post, and an internal surface of the third recess.

7. The printed circuit board of claim 1 , wherein the first conductor-pattern layer includes a first pad and the second conductor-pattern layer includes a second pad, wherein the first and second pads are in contact with the first metal post, and
wherein a diameter of the first metal post is greater than a diameter of each of the first and second pads.

8. The printed circuit board of claim 7 , wherein the first conductor-pattern layer includes a seed pattern disposed between the other end of the first metal post and the first pad.

9. The printed circuit board of claim 1 , wherein the first conductor-pattern layer is disposed to protrude on the first surface of the first insulating layer.

10. The printed circuit board of claim 1 , wherein the second conductor-pattern layer includes:
a seed layer disposed on at least a portion of each of a surface of the one end of the first metal post exposed to the bottom surface of the first recess and an internal surface of the first recess including the bottom surface of the first recess; and
a plating layer disposed on the seed layer to fill at least a portion of the first recess.

11. A printed circuit board, comprising:
a first insulating layer;
a first conductor-pattern layer disposed on a first surface of the first insulating layer;
a first recess disposed in a second surface of the first insulating layer opposing the first surface of the first insulating layer;
a second conductor-pattern layer disposed in the first recess;
a first metal post penetrating the first insulating layer, connecting the first and second conductor-pattern layers to each other;
a second insulating layer having one surface in contact with the second surface of the first insulating layer;
a second recess disposed in another surface of the second insulating layer opposing the one surface of the second insulating layer;
a third conductor-pattern layer disposed in the second recess;
a second metal post penetrating the second insulating layer and connecting the second and third conductor-pattern layers to each other;
a solder resist disposed on the second insulating layer and having an opening to expose a portion of the third conductor-pattern layer;
a third insulating layer disposed on an opposing side of the first insulating layer with respect to the second insulating layer such that the first insulating layer is disposed between the second insulating layer and the third insulating layer;
a fourth conductor-pattern layer disposed on a first surface of the third insulating layer;
a third recess disposed in a second surface of the third insulating layer opposing the first surface of the third insulating layer;
a fifth conductor-pattern layer disposed in the third recess; and
a third metal post penetrating the third insulating layer, connecting the fourth and fifth conductor-pattern layers to each other, and having one end protruding from a bottom surface of the third recess towards the second insulating layer,
wherein a side surface of the first metal post is only in contact with the first insulating layer, and
wherein the first and second insulating layer have the same material.

12. The printed circuit board of claim 11 , wherein the second conductor-pattern layer includes:
a seed layer disposed on at least a portion of each of a surface of the one end of the first metal post and an internal surface of the first recess including the bottom surface of the first recess.

13. The printed circuit board of claim 12 , wherein the seed layer is disposed on at least a portion of each of an upper surface of the one end of the first metal post, and the internal surface of the first recess.

14. The printed circuit board of claim 11 , wherein a partial region of the fifth conductor-pattern layer has a cross-sectional area decreasing in a direction from the second surface of the third insulating layer toward the first surface of the third insulating layer.

15. The printed circuit board of claim 14 , wherein the partial region of the fifth conductor-pattern layer is disposed more adjacent to the third metal post than the other region of the fifth conductor-pattern layer.

16. The printed circuit board of claim 11 , wherein, in the first insulating layer, a region in which the second conductor-pattern layer is

Assignees

• Samsung Electro Mech

Inventors

• Lee Jin Uk
• Cho Sangik
• Hwang Chi Won
• Kim Eun Sun

Classifications

• H05K1/111

  Pads for surface mounting, e.g. lay-out · CPC title

• H05K1/115 Primary

  Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

• H05K1/053

  the metal substrate being covered by an inorganic insulating layer · CPC title

• H05K2201/09036

  Recesses or grooves in insulating substrate · CPC title

• H05K3/4007 Primary

  Surface contacts, e.g. bumps (H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3465) · CPC title