Strained semiconductor monocrystalline nanostructure

Patent metadata

Field	Value
Publication number	US-12432985-B2
Application number	US-202117241318-A
Country	US
Kind code	B2
Filing date	Apr 27, 2021
Priority date	Apr 27, 2020
Publication date	Sep 30, 2025
Grant date	Sep 30, 2025

Abstract

A semiconductor structure comprises a semiconductor substrate having a top layer and one or more semiconductor monocrystalline nanostructures. Each nanostructure has a first and a second extremity defining an axis parallel to the top surface of the semiconductor substrate and separated therefrom by a distance, and a source structure epitaxially grown on the first extremity and a drain structure epitaxially grown on the second extremity. The source and drain structures are made of a p-doped (or alternatively n-doped) semiconductor monocrystalline material having a smaller (or alternatively larger) unstrained lattice constant than the unstrained lattice constant of the semiconductor monocrystalline material making the semiconductor monocrystalline nanostructure on which they are grown, thereby creating compressive (or alternatively tensile) strain in that semiconductor monocrystalline nanostructure.

First claim

What is claimed is:

1. A semiconductor structure comprising:
a semiconductor substrate having a top surface; and
a first semiconductor monocrystalline nanostructure co-planar to a second semiconductor monocrystalline nanostructure that is insulated from and adjacent to, the first semiconductor nanostructure, each nanostructure having a first and a second extremity separated by a length of the nanostructure parallel to the top surface of the semiconductor substrate and separated therefrom by a non-zero distance, each nanostructure having a source structure epitaxially grown on the first extremity and a drain structure epitaxially grown on the second extremity,
wherein neither the source structure nor the drain structure of the first nanostructure contacts either the source structure or drain structure of the second nanostructure; and
wherein the source and drain structures of each nanostructure comprise a p-doped semiconductor monocrystalline material that is different from the semiconductor monocrystalline material making the semiconductor monocrystalline nanostructure on which they are grown, thereby creating compressive strain such that the compressive strain is substantially in the longitudinal direction of the semiconductor monocrystalline nanostructure, or wherein the source and drain structures of each nanostructure comprise an n-doped semiconductor monocrystalline material that is different from the semiconductor monocrystalline material making the semiconductor monocrystalline nanostructure on which they are grown, thereby creating tensile strain such that the tensile strain is substantially in the longitudinal direction of the semiconductor monocrystalline nanostructure.

2. The semiconductor structure according to claim 1 , wherein the source and drain structures comprise p-doped Si 1-x Ge x when the semiconductor monocrystalline nanostructure on which they are grown comprises Si 1-y Ge y wherein x<y≤1.

3. The semiconductor structure according to claim 1 , wherein the source and drain structures comprise p-doped SiC when the semiconductor monocrystalline nanostructures on which they are grown comprise Si or Si 1-y Ge y with 0<y≤1.

4. The semiconductor structure according to claim 1 , wherein the source and drain structures comprise n-doped Si 1-x Ge x when the semiconductor monocrystalline nanostructure on which they are grown comprises Si 1-y Ge y wherein x>y≥0.

5. The semiconductor structure according to claim 4 , wherein the source and drain structures comprise n-doped Si 1-x Ge x while the semiconductor monocrystalline nanostructure on which they are grown comprise Si wherein 0.70≥x>0.

6. The semiconductor structure according to claim 1 , wherein the source and drain structures comprise n-doped Ge 1-w Sn w wherein 0<w<0.1 when the semiconductor monocrystalline nanostructure on which they are grown comprise Ge or Si 1-y Ge y with 0≤y≤1.

7. The semiconductor structure according to claim 6 , wherein the source and drain structures comprise n-doped Si 1-x Ge x while the semiconductor monocrystalline nanostructure on which they are grown comprise Si wherein 0.70≥x>0.

8. The semiconductor structure according to claim 1 , wherein the source and drain structures comprise n-doped Si i Ge 1-i-j , wherein 0<i<j<1, and 0<i+j<1 when the semiconductor monocrystalline nanostructure on which they are grown comprise Ge.

9. The semiconductor structure according to claim 8 , wherein the source and drain structures comprise n-doped Si 1-x Ge x while the semiconductor monocrystalline nanostructure on which they are grown comprise Si wherein 0.70≥x>0.

10. The semiconductor structure according to claim 1 , wherein at least one of the first and second semiconductor monocrystalline nanostructures is selected from nanowires and nanosheets.

11. The semiconductor structure according to claim 5 , wherein the semiconductor structure is a complementary field-effect transistor.

12. The semiconductor structure according to claim 1 , wherein the source and drain structures each display two intersecting planes that form an angle, wherein the angle of the source structure points away from the angle of the drain structure.

13. The semiconductor structure according to claim 1 , wherein the semiconductor monocrystalline nanostructures have a height ranging from 10 to 60 nm.

14. The semiconductor structure according to claim 1 , wherein the semiconductor monocrystalline nanostructures have a length ranging from 40 to 100 nm.

15. The semiconductor structure according to claim 1 , wherein the semiconductor monocrystalline nanostructures have a ratio length on height ranging from 2 to 4.

16. The semiconductor structure according to claim 1 , wherein the source and drain structures comprise a group IV semiconductor doped with one or more of Sb and Bi.

17. A method for forming a semiconductor structure according to claim 1 , comprising:
providing a semiconductor substrate having a top surface;
providing a first semiconductor monocrystalline nanostructure and a second semiconductor monocrystalline nanostructure, each nanostructure having a first and a second extremity separated by a length of the nanostructure parallel to the top surface of the semiconductor substrate and separated therefrom by a non-zero distance; and
growing epitaxially on each first and second semiconductor monocrystalline nanostructures a source structure on the first extremity, and a drain structure on the second extremity,
wherein neither the source structure nor the drain structure of the first nanostructure contacts either the source structure or drain structure of the second nanostructures, and
wherein the source and drain structures of each nanostructure comprise a p-doped material that is different from the semiconductor monocrystalline material making the semiconductor monocrystalline nanostructure on which they are grown, thereby creating compressive strain in that semiconductor monocrystalline nanostructure, or wherein the source and drain structures of each nanostructure comprise an n-doped material that is different from the semiconductor monocrystalline material making the semiconductor monocrystalline nanostructure on which they are grown, thereby creating tensile strain in that semiconductor monocrystalline nanostructure.

18. The semiconductor structure according to claim 1 , wherein the epitaxially grown source and drain structures comprise a p-doped semiconductor monocrystalline material having a first lattice constant and wherein the semiconductor monocrystalline nanostructures comprises a second semiconductor monocrystalline material having a second lattice constant that is larger than the first lattice constant.

19. The semiconductor structure according to claim 1 , wherein the epitaxially grown source and drain structures comprise an n-doped material having a first lattice constant and wherein the semiconductor monocrystalline nanostructure are made of a second semiconductor monocrystalline material having a second lattice constant that is smaller than the first lattice constant.

20. The semiconductor structure according to claim 16 , wherein the group IV semiconductor is further doped with one or more of As and P.

21. The semiconductor structure according to claim 1 , wherein the source and drain structures comprise a group IV semiconductor doped with one or more of Sb and Bi and with one or more of As and P.

22. The semiconductor structure according to claim 1 , wherein the compressive strain is present in thre

Assignees

• Imec Vzw

Inventors

• Eneman Geert
• Briggs Basoene
• De Keersgieter An
• Veloso Anabela
• Favia Paola

Classifications

• H10P14/3462

  Nanowires · CPC title

• H10P14/3452

  Microstructure · CPC title

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• H10D62/822

  comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions · CPC title

• H10D62/121 Primary

  oriented parallel to substrates · CPC title