Oxide thin film transistor and preparation method thereof, and display device

Patent metadata

Field	Value
Publication number	US-12432980-B2
Application number	US-202117781773-A
Country	US
Kind code	B2
Filing date	Jun 25, 2021
Priority date	Jun 25, 2021
Publication date	Sep 30, 2025
Grant date	Sep 30, 2025

Abstract

At least one embodiment of the present disclosure provides an oxide thin film transistor, a display device, and a preparation method of the oxide thin film transistor, and the oxide thin film transistor includes a base substrate; an oxide semiconductor layer provided on the base substrate, and an insulating layer provided on a side of the oxide semiconductor layer away from the base substrate; in which the insulating layer is made of oxide; the insulating layer includes a first insulating layer and a second insulating layer which are stacked; a density of the second insulating layer is greater than a density of the first insulating layer; and the second insulating layer is farther away from the base substrate than the first insulating layer.

First claim

What is claimed is:

1. An oxide thin film transistor, comprising:
a base substrate;
an oxide semiconductor layer provided on the base substrate, and
an insulating layer provided on a side of the oxide semiconductor layer away from the base substrate;
wherein the insulating layer is made of oxide; the insulating layer comprises a first insulating layer and a second insulating layer which are stacked; a density of the second insulating layer is greater than a density of the first insulating layer; and the second insulating layer is farther away from the base substrate than the first insulating layer;
the insulating layer further comprises a third insulating layer, the third insulating layer is provided on a side of the first insulating layer close to the base substrate;
the oxide semiconductor layer and the insulating layer are in contact with each other in a region between a source electrode and a drain electrode;
a gate electrode is provided between a layer where the source electrode and the drain electrode are located and the oxide semiconductor layer; the insulating layer further comprises a fourth insulating layer provided between the first insulating layer and the second insulating layer; and the gate electrode is provided between the fourth insulating layer and the first insulating layer.

2. The oxide thin film transistor according to claim 1 , wherein the oxide semiconductor layer is a metal oxide semiconductor layer, and the insulating layer is made of non-metallic oxide.

3. The oxide thin film transistor according to claim 1 , wherein materials of the first insulating layer and the second insulating layer at least comprise O atom and Si atom.

4. The oxide thin film transistor according to claim 1 , wherein a density of the third insulating layer is greater than the density of the first insulating layer; and the third insulating layer is in contact with the oxide semiconductor layer.

5. The oxide thin film transistor according to claim 4 , wherein a difference between an etching rate of the first insulating layer and an etching rate of the second insulating layer is 20 Å/s to 40 Å/s; and a difference between the etching rate of the first insulating layer and an etching rate of the third insulating layer is 10 Å/s to 20 Å/s.

6. The oxide thin film transistor according to claim 4 , wherein an etching solution used for etching the first insulating layer, the second insulating layer and the third insulating layer is a mixed solution of NH 3 F and HF; in the mixed solution of NH 3 F and HF, mass percentages of NH 3 F and HF are respectively 29.8% to 30.2% and 5.9% to 6.1%.

7. The oxide thin film transistor according to claim 4 , wherein under a temperature condition of 200° C. to 350° C., an oxygen release amount of the second insulating layer, the first insulating layer and the third insulating layer which are stacked is less than a sum of oxygen release amounts of the second insulating layer, the first insulating layer and the third insulating layer as single layers within a same temperature range.

8. The oxide thin film transistor according to claim 1 , wherein the oxide semiconductor layer comprises a first oxide semiconductor layer and a second oxide semiconductor layer which are stacked; a density of the second oxide semiconductor layer is greater than a density of the first oxide semiconductor layer; and the second oxide semiconductor layer is farther away from the base substrate than the first oxide semiconductor layer.

9. The oxide thin film transistor according to claim 1 , wherein the insulating layer further comprises a fifth insulating layer provided between the first insulating layer and the fourth insulating layer; a density of the fifth insulating layer is greater than a density of the first insulating layer; and both a material of the fifth insulating layer and a material of the first insulating layer comprise Si and O.

10. The oxide thin film transistor according to claim 1 , wherein a difference between an etching rate of the first insulating layer and an etching rate of the second insulating layer is 20 Å/s to 40 Å/s.

11. A display device, comprising the oxide thin film transistor according to claim 1 .

12. A preparation method of an oxide thin film transistor, comprising:
providing a base substrate;
forming an oxide semiconductor layer on the base substrate;
forming a first insulating layer on a side of the oxide semiconductor layer away from the base substrate; and
forming a second insulating layer on a side of the first insulating layer away from the base substrate;
forming a third insulating layer on a side of the first insulating layer close to the base substrate;
forming a fourth insulating layer between the first insulating layer and the second insulating layer;
wherein a density of the second insulating layer is greater than a density of the first insulating layer; the oxide semiconductor layer and the third insulating layer are in contact with each other in a region between a source electrode and a drain electrode, a gate electrode is formed between a layer where the source electrode and the drain electrode are located and the oxide semiconductor layer, and the gate electrode is provided between the fourth insulating layer and the first insulating layer.

13. The preparation method according to claim 12 , a density of the third insulating layer is greater than the density of the first insulating layer.

14. The preparation method according to claim 12 , wherein the forming an oxide semiconductor layer comprises:
applying a first oxide semiconductor layer thin film and performing a patterning process to form the first oxide semiconductor layer;
applying a second oxide semiconductor layer thin film on the first oxide semiconductor layer and performing a patterning process to form a second oxide semiconductor layer;
wherein a density of the second oxide semiconductor layer is greater than a density of the first oxide semiconductor layer.

Assignees

• Boe Technology Group Co Ltd

Inventors

• Wang Lizhong
• Yuan Guangcai
• Ning ce
• Yao Nianqi
• Hu hehe
• Lei Liping
• Wang Dongfang
• Xue Dapeng
• Dong Shuilang
• Li Zhengliang

Classifications

• H10D30/6739

  Conductor-insulator-semiconductor electrodes · CPC title

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D30/6758

  characterised by the insulating substrates · CPC title

• H10D99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title