Method for manufacturing a semiconductor device at low temperature

US9831275B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9831275-B2
Application numberUS-201615010392-A
CountryUS
Kind codeB2
Filing dateJan 29, 2016
Priority dateFeb 4, 2015
Publication dateNov 28, 2017
Grant dateNov 28, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for manufacturing a highly reliable semiconductor device is provided. The method includes the steps of: forming an oxide semiconductor film at a first temperature; processing the oxide semiconductor film into an island shape; not performing a process at a temperature higher than the first temperature, but depositing a material to be source and drain electrodes by a sputtering method; processing the material to form the source and drain electrodes; forming a protective insulating film, and then forming a first barrier film; adding excess oxygen or oxygen radicals to the protective insulating film through the first barrier film; performing heat treatment at a second temperature lower than 400° C. to diffuse the excess oxygen or oxygen radicals into the oxide semiconductor film; and removing part of the first barrier film and part of the protective insulating film by wet etching, and then forming a second barrier film.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for manufacturing a semiconductor device, comprising the steps of: forming an oxide semiconductor film at a first temperature; processing the oxide semiconductor film into an island shape; then, depositing a material to be a source electrode and a drain electrode by a sputtering method over the oxide semiconductor film; processing the material to form the source electrode and the drain electrode; then, forming a protective insulating film over the oxide semiconductor film, the source electrode and the drain electrode, then forming a first barrier film over the protective insulating film; adding excess oxygen or an oxygen radical to the protective insulating film through the first barrier film; performing heat treatment at a second temperature lower than 400° C. to diffuse the excess oxygen or the oxygen radical into the oxide semiconductor film; removing the first barrier film or a part of the first barrier film, and a part of the protective insulating film by wet etching; and then forming a second barrier film over the protective insulating film, wherein temperatures of processes after processing the oxide semiconductor film into the island shape and before depositing the material to be the source electrode and the drain electrode are lower than or equal to the first temperature. 2. The method for manufacturing the semiconductor device, according to claim 1 , wherein the first barrier film is an indium tin oxide film, an indium tin silicon oxide film, or an indium oxide film. 3. The method for manufacturing the semiconductor device, according to claim 1 , wherein the second barrier film is a silicon nitride oxide film or a silicon nitride film. 4. The method for manufacturing the semiconductor device, according to claim 1 , wherein the oxide semiconductor film has a layered structure of a first oxide semiconductor film having an atomic ratio of In:M:Zn=4:α1 (1.5≦α1≦2.5):α2 (2.5≦α2≦3.5) and a second oxide semiconductor film having an atomic ratio of In:M:Zn=1:β1 (0.8≦β1≦1.2):β2 (0.8≦β1≦1.2), and wherein M is aluminum, gallium, yttrium, or tin. 5. The method for manufacturing the semiconductor device, according to claim 1 , wherein the oxide semiconductor film includes a CAAC-OS. 6. The method for manufacturing the semiconductor device, according to claim 1 , wherein the second temperature is lower than 375° C. 7. The method for manufacturing the semiconductor device, according to claim 1 , wherein the second temperature is higher than or equal to 340° C. and lower than or equal to 360° C. 8. The method for manufacturing the semiconductor device, according to claim 1 , wherein the protective insulating film has a layered structure including a first protective insulating film and a second protective insulating film over the first protective insulating film, and wherein a part of the second protective insulating film is removed by wet etching. 9. A method for manufacturing a semiconductor device, comprising the steps of: forming an oxide semiconductor film at a first temperature; processing the oxide semiconductor film into an island shape; then, depositing a material to be a source electrode and a drain electrode by a sputtering method; processing the material to form the source electrode and the drain electrode; then, forming a protective insulating film over the oxide semiconductor film, the source electrode and the drain electrode, forming a metal oxide film as a first barrier film over the protective insulating film by a sputtering method to add excess oxygen or an oxygen radical to the protective insulating film; and performing heat treatment at a second temperature lower than 400° C. to diffuse the excess oxygen or the oxygen radical into the oxide semiconductor film, wherein the oxide semiconductor film has a layered structure of a first oxide semiconductor film having an atomic ratio of In:M:Zn=4:α1 (1.5≦α1≦2.5):α2 (2.5≦α2≦3.5) and a second oxide semiconductor film having an atomic ratio of In:M:Zn =1: β1 (0.8≦β1≦1.2):β2 (0.8≦β2≦1.2), wherein M is aluminum, gallium, yttrium, or tin, and wherein temperatures of processes after processing the oxide semiconductor film into the island shape and before depositing the material to be the source electrode and the drain electrode are lower than or equal to the first temperature. 10. The method for manufacturing the semiconductor device, according to claim 9 , wherein the metal oxide film is an aluminum oxide film, a hafnium oxide film, or an yttrium oxide film. 11. The method for manufacturing the semiconductor device, according to claim 9 , wherein the oxide semiconductor film includes a CAAC-OS. 12. The method for manufacturing the semiconductor device, according to claim 9 , wherein the second temperature is lower than 375° C. 13. The method for manufacturing the semiconductor device, according to claim 9 , wherein the second temperature is higher than or equal to 340° C. and lower than or equal to 360° C. 14. The method for manufacturing the semiconductor device, according to claim 9 , wherein the protective insulating film has a layered structure including a first protective insulating film and a second protective insulating film over the first protective insulating film, and wherein a part of the second protective insulating film is removed by wet etching. 15. A method for manufacturing a semiconductor device, comprising the steps of: forming an oxide semiconductor film at a first temperature; processing the oxide semiconductor film into an island shape; after processing the oxide semiconductor film, depositing a material to be a source electrode and a drain electrode over the oxide semiconductor film by a sputtering method; processing the material to form the source electrode and the drain electrode; forming a first protective insulating film and a second protective insulating film over the oxide semiconductor film, the source electrode, and the drain electrode; heating the first protective insulating film and the second protective insulating film at a second temperature higher than the first temperature; after heating the first protective insulating film and the second protective insulating film, forming a first barrier film over the second protective insulating film; adding excess oxygen or an oxygen radical to the second protective insulating film through the first barrier film; after adding the excess oxygen or the oxygen radical, removing a part of the first barrier film and a part of the second protective insulating film by wet etching; and after removing the part of the first barrier film and the part of the second protective insulating film, forming a second barrier film over the second protective insulating film at a third temperature higher than the first temperature, wherein one of or both the second temperature and the third temperature is/are the highest in a process of the steps. 16. The method for manufacturing the semiconductor device, according to claim 15 , wherein the oxide semiconductor film has a layered structure of a first oxide semiconductor film having an atomic ratio of In:M:Zn=4:α1 (1.5≦α1≦2.5):α2 (2.5≦α2≦3.5) and a second oxide semiconductor film having an atomic ratio of In:M:Zn=1:α1 (0.8≦β1≦1.2):β2 (0.8≦α2≦1.2), and wherein M is aluminum, gallium, yttrium, or tin. 17. The method for manufacturing the semiconductor device, according to claim 15 , wherein the oxide semiconductor film includes a crystal part, and wherein the crystal part has c-axis alignment.

Assignees

Inventors

Classifications

  • having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs · CPC title

  • characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

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What does patent US9831275B2 cover?
A method for manufacturing a highly reliable semiconductor device is provided. The method includes the steps of: forming an oxide semiconductor film at a first temperature; processing the oxide semiconductor film into an island shape; not performing a process at a temperature higher than the first temperature, but depositing a material to be source and drain electrodes by a sputtering method; p…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H01L27/1225. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 28 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).