Display substrate, method of manufacturing the display substrate, and display device

Patent metadata

Field	Value
Publication number	US-12426459-B2
Application number	US-202117787986-A
Country	US
Kind code	B2
Filing date	Aug 4, 2021
Priority date	Sep 10, 2020
Publication date	Sep 23, 2025
Grant date	Sep 23, 2025

Abstract

A display substrate, a method of manufacturing the display substrate, and a display device are provided. The display substrate includes: a base substrate, a plurality of sub-pixels, a gate driving circuit, a plurality of input contact pads, a plurality of output contact pads and a contact pad insulating layer. Surfaces of the input contact pads away from the base substrate and surfaces of the output contact pads away from the base substrate are exposed from the contact pad insulating layer. The contact pad insulating layer includes a first portion having a first thickness and a second portion having a second thickness smaller than the first thickness. Edges of the input contact pads and edges of the output contact pads are covered by the first portion. The second portion is located in the region between the input contact pads and the output contact pads.

First claim

What is claimed is:

1. A display substrate, comprising:
a base substrate comprising a display region, a bonding region located on at least one side of the display region, and a side region located on at least another side of the display region;
a plurality of sub-pixels located in the display region;
a gate driving circuit located in the side region, connected to the plurality of sub-pixels, and configured to provide a gate driving signal to the plurality of sub-pixels;
a plurality of input contact pads located in the bonding region, and configured to be electrically connected to an external circuit;
a plurality of output contact pads located in the bonding region between the plurality of input contact pads and the display region, and electrically connected to the plurality of sub-pixels and the gate driving circuit;
a contact pad insulating layer located in the bonding region within a gap between adjacent input contact pads among the plurality of input contact pads, a gap between adjacent output contact pads among the plurality of output contact pads, and a region between the plurality of input contact pads and the plurality of output contact pads, wherein surfaces of the plurality of input contact pads away from the base substrate and surfaces of the plurality of output contact pads away from the base substrate are exposed from the contact pad insulating layer, wherein the contact pad insulating layer comprises a first portion having a first thickness and a second portion having a second thickness smaller than the first thickness, edges of the plurality of input contact pads and edges of the plurality of output contact pads are covered by the first portion of the contact pad insulating layer, and the second portion of the contact pad insulating layer is located in the region between the plurality of input contact pads and the plurality of output contact pads; and
a plurality of first dummy contact pads located in the bonding region within the region between the plurality of input contact pads and the plurality of output contact pads,
wherein edges of the plurality of first dummy contact pads are covered by the first portion of the contact pad insulating layer, and surfaces of the plurality of first dummy contact pads away from the base substrate are exposed from the first portion of the contact pad insulating layer; and
wherein the second portion of the contact pad insulating layer comprises a first sub-portion and a second sub-portion, the first sub-portion is located in a region between the plurality of first dummy contact pads and the plurality of input contact pads, the second sub-portion is located in a region between the plurality of first dummy contact pads and the plurality of output contact pads.

2. The display substrate according to claim 1 , further comprising: a plurality of array test contact pads located in the bonding region within the region between the plurality of first dummy contact pads and the plurality of input contact pads, and electrically connected to the plurality of sub-pixels,
wherein the first portion of the contact pad insulating layer comprises a first sub-portion and a second sub-portion, the edges of the plurality of input contact pads, the edges of the plurality of output contact pads and the edges of the first dummy contact pads are covered by the first sub-portion of the first portion of the contact pad insulating layer, edges of the plurality of array test contact pads are covered by the second sub-portion of the first portion of the contact pad insulating layer, and surfaces of the plurality of array test contact pads away from the base substrate are exposed from the first portion of the contact pad insulating layer; and
wherein a projection of the second sub-portion of the first portion of the contact pad insulating layer on the base substrate is located within a projection of the first sub-portion of the second portion of the contact pad insulating layer on the base substrate.

3. The display substrate according to claim 1 , a projection of each of the plurality of input contact pads and the plurality of output contact pads on the base substrate is spaced from a projection of the second portion of the contact pad insulating layer on the base substrate by a distance of 3 μm to 100 μm.

4. The display substrate according to claim 1 , wherein the second thickness is zero.

5. The display substrate according to claim 2 , wherein:
the plurality of input contact pads are arranged in at least a first row along a first direction, which is an extension direction of a side edge of the display region facing the bonding region;
the plurality of output contact pads are arranged in at least a second row along the first direction;
the plurality of first dummy contact pads are arranged in at least a third row along the first direction; and
the plurality of array test contact pads are arranged in at least a fourth row along the first direction.

6. The display substrate according to claim 5 , further comprising a plurality of second dummy contact pads located in the bonding region and arranged in at least a first column and a second column along a second direction perpendicular to the first direction, wherein the first column and the second column are respectively located on two sides of the plurality of first dummy contact pads in the first direction,
wherein edges of the plurality of second dummy contact pads are covered by the first portion of the contact pad insulating layer, and surfaces of the plurality of second dummy contact pads away from the base substrate are exposed from the first portion of the contact pad insulating layer; and
wherein a projection of each of the plurality of second dummy contact pads on the base substrate is spaced from a projection of the second portion of the contact pad insulating layer on the base substrate by a distance of 3 μm to 100 μm.

7. The display substrate according to claim 1 , wherein at least one of the plurality of input contact pads and the plurality of output contact pads comprises:
a first lead connection portion located on the base substrate, wherein a first lead connection portion of the input contact pad is electrically connected to a connection contact pad for connecting to the external circuit through a first lead disposed in the bonding region, a first lead connection portion of the output contact pad is electrically connected to the gate driving circuit or to at least one of the plurality of sub-pixels through a second lead disposed in the bonding region;
a first conductor portion located on a side of the first lead connection portion away from the base substrate, and electrically connected to the first lead connection portion;
a second conductor portion located on a side of the first conductor portion away from the base substrate, and electrically connected to the first conductor portion, wherein an edge of the second conductor portion is covered by the first portion of the contact pad insulating layer.

8. The display substrate according to claim 7 , further comprising:
a first gate insulating layer of the bonding region, wherein the first gate insulating layer of the bonding region is located in the bonding region and covers the base substrate, wherein the first lead connection portion is located on a side of the first gate insulating layer of the bonding region away from the base substrate;
a second gate insulating layer of the bonding region, wherein the second gate insulating layer of the bonding region is located in the bonding region on the side of the first gate insulating layer of the bonding region away from the base substrate, and covers the first lead connection portion;
an interlayer insulating layer of the bonding region, wherein the interlayer insula

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd

Inventors

• Cheng Bo
• Gou Jie
• Du Mengmeng
• Yan Jun
• Zhang Bo
• Yang Yixiang
• Zhang Zhenhua
• Ma Hongwei

Classifications

• H10W46/00

  Marks applied to devices, e.g. for alignment or identification · CPC title

• H10K59/00

  Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00 · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• G09G3/006

  Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title