Baseplate circuit and display panel

Patent metadata

Field	Value
Publication number	US-9835917-B2
Application number	US-201514773355-A
Country	US
Kind code	B2
Filing date	Aug 11, 2015
Priority date	Jul 29, 2015
Publication date	Dec 5, 2017
Grant date	Dec 5, 2017

Abstract

A baseplate circuit is disclosed. The baseplate comprises an IC region, a plurality of WOA regions, a plurality of GOA regions, and a plurality of switches. Each WOA region comprises a plurality of baseplate conducting wires, each of the baseplate conducting wires is electrically connected with the IC region. Each GOA region comprises a plurality of gate lines, each of the gate lines is electrically connected with one of the baseplate conducting wires. Each of the switches is used to electrically connect one of the gate lines and one of the baseplate conducting wires.

First claim

What is claimed is:

1. A baseplate circuit, disposed in a baseplate, the baseplate circuit comprising:
an IC (Integrated Chip) region;
a plurality of WOA (Wire On Array) regions, each of the WOA regions comprising a plurality of baseplate conducting wires, each of the baseplate conducting, wires being electrically connected with the IC region;
a plurality of GOA (Gate On Array) regions, each of the GOA regions comprising a plurality of gate lines, each of the gate lines being electrically connected with one of the baseplate conducting wires;
a plurality of switches, each of the switches being used to directly electrically connect one of the gate lines and one of the baseplate conducting wires;
an active region, being used to connect with the GOA regions, the active region comprising a plurality of pixel units, the pixel units being connected with the GOA regions and a plurality of data lines of the IC region;
a FPC (Flexible Printed Circuit) region, being used to connect with an external assembly module; and
an external connecting region, being used to accommodate the data lines, being used to connect the active region and the IC region;
wherein the IC region outputs a control signal used to selectively switch on/off the switches, the IC region further outputs a testing signal used to pass through the WOA regions and the GOA regions or the WOA regions only, according to the control signal, the baseplate is a glass baseplate.

2. The baseplate circuit according to claim 1 , wherein each of the switches comprises a TFT (thin film transistor), the TFT comprises a first terminal, a second terminal, and a control terminal, the first terminal connects with one of the baseplate conducting wires, the second terminal connects with one of the gate lines.

3. The baseplate circuit according to claim 2 , wherein the baseplate circuit further comprises a plurality of pixel testing regions, each of the pixel testing regions comprises:
a first testing pad, being used to electrically connect the control terminal and the IC region; and
a plurality of second testing pads, each of the second testing, pads being electrically connected with the first terminal of the TFT.

4. The baseplate circuit according to claim 2 , wherein the first terminal is a source electrode, the second terminal is a drain electrode and the control terminal is a gate electrode.

5. A baseplate circuit, disposed in a baseplate, the baseplate circuit comprising:
an IC region;
a plurality of WOA regions, each of the WOA regions comprising a plurality of baseplate conducting wires, each of the baseplate conducting wires being electrically connected with the IC region;
a plurality of GOA regions, each of the GOA regions comprising a plurality of gate lines, each of the gate lines being electrically connected with one of the baseplate conducting wires; and
a plurality of switches, each of the switches being used to directly electrically connect one of the gate lines and one of the baseplate conducting wires;
the IC region outputs a control signal used to selectively switch on/off the switches, the IC region further outputs a testing signal used to pass through the WOA regions and the GOA regions or the WOA regions only, according to the control signal, the baseplate is a glass baseplate.

6. The baseplate circuit according to claim 5 , wherein the baseplate circuit further comprises an active region, being used to connect with the GOA regions, the active region comprises a plurality of pixel units, the pixel units being connected with GOA regions and a plurality of data lines of the IC region.

7. The baseplate circuit according to claim 5 , wherein the baseplate is a glass baseplate.

8. The baseplate circuit according to claim 5 , wherein the baseplate circuit further comprises a FPC region being used to connect with an external assembly module.

9. The baseplate circuit according to claim 5 , wherein the baseplate circuit further comprises an external connecting region being used to accommodate the data lines, the data lines being used to connect the active region and the IC region.

10. The baseplate circuit according to claim 5 , wherein each of the switches comprises a TFT (thin film transistor), the TFT comprises a first terminal, a second terminal, and a control terminal, the first terminal connects with one of the baseplate conducting wires, the second terminal connects with one of the gate lines.

11. The baseplate circuit according to claim 10 , wherein the baseplate circuit further comprises a plurality of pixel testing regions, each of the pixel testing regions comprises:
a first testing pad, being used to electrically connect the control terminal and the IC region; and
a plurality of second testing pads, each of the second testing pads being electrically connected with the first terminal of the TFT.

12. The baseplate circuit according to claim 10 , wherein the first terminal is source electrode, the second terminal is drain electrode and the control terminal is a gate electrode.

13. The baseplate circuit according to claim 5 , wherein the IC region outputs a control signal used to selectively switch on/off the switches.

14. A display panel, which comprising a baseplate circuit and a main board, wherein the main board connects with the baseplate circuit and provides display information which the baseplate needs, the baseplate circuit comprising:
an IC region;
a plurality of WOA regions, each of the WOA regions comprising a plurality of baseplate conducting wires, each of the baseplate conducting wires being electrically connected with the IC region;
a plurality of GOA regions, each of the GOA regions comprising a plurality of gate lines, each of the gate lines being electrically connected with one of the baseplate conducting wires;
a plurality of switches, each of the switches being used to directly electrically connect one of the gate lines and one of the baseplate conducting wires;
an active region, being used to connected with the GOA regions, the active region comprises a plurality of pixel units, the pixel units being connected with GOA regions and a plurality of data lines of the IC region;
a FPC region being used to connect with an external assembly module; and
an external connecting region being used to accommodate the data lines, the data lines being used to connect the active region and the IC region;
wherein the IC region outputs a control signal used to selectively switch on/off the switches, the IC region further outputs a testing signal used to pass through the WOA regions and the GOA regions or the WOA regions only, according to the control signal, the baseplate is a glass baseplate.

15. The baseplate circuit according to claim 14 , wherein each of the switches comprises a TFT, the TFT comprises a first terminal, a second terminal, and a control terminal, the first terminal connects with one of the baseplate conducting wires, the second terminal connects with one of the gate lines.

16. The baseplate circuit according to claim 15 , wherein the baseplate circuit further comprises a plurality of pixel testing regions, each of the pixel testing regions comprises:
a first testing pad being used to electrically connect the control terminal and the IC region; and
a plurality of second testing pads, each of the second testing pads being electrically connected with the first terminal of the TFT.

17. The baseplate circuit according to claim 15 , wherein the first terminal is a source electrode, the second terminal is a drain electrode and the control terminal is a gate electrode.

Assignees

• Wuhan China Star Optoelectronics Technology Co Ltd

Inventors

• Zhao Mang
• Tian Yong

Classifications

• H10P74/277

  Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers · CPC title

• G02F2202/104

  poly-Si · CPC title

• H01L27/1222

  Electricity · mapped topic

• G01R31/2825

  in household appliances or professional audio/video equipment (testing LAN's H04L43/50; testing TV systems H04N17/00; testing loudspeakers H04R29/00) · CPC title

• G09G2330/12

  Test circuits or failure detection circuits included in a display system, as permanent part thereof · CPC title