Circuit and system integration onto a microdevice substrate

US12419145B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12419145-B2
Application numberUS-202318161366-A
CountryUS
Kind codeB2
Filing dateJan 30, 2023
Priority dateFeb 9, 2017
Publication dateSep 16, 2025
Grant dateSep 16, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated optical display system includes a backplane with appropriate electronics, and an array of micro-devices. A touch sensing structure may be integrated into the system. In one embodiment, an integrated circuit and system is integrated on top of micro-devices transferred to a substrate. Openings in a planarization layer (or layers) may be provided to connect the micro-devices with electrodes and other circuitry. Light reflectors may be used to redirect the light, and color conversion layers or color filters may be integrated before the micro-devices or on the substrate surface opposite to the surface of micro-devices.

First claim

Opening claim text (preview).

What is claimed is: 1. A display system comprising: a substrate; one or more planarization layers formed over and in contact with the substrate; a light distribution layer and a bonding layer formed over a top surface of the one or more planarization layers and connected together; at least one micro device transferred to on top of the bonding layer; and one or more color conversion layers disposed on or over the at least one micro device. 2. The display system of claim 1 , wherein the light distribution layer can be on part of a bank layer with a reflective layer or fill the entire bank layer. 3. The display system of claim 1 , wherein a reflective layer is formed between the one or more planarization layers and the bonding layer to direct light through the light distribution layer. 4. The display system of claim 1 , wherein a buffer layer is modified to separate the substrate from a display system.

Assignees

Inventors

Classifications

  • Package configurations · CPC title

  • Coatings, e.g. passivation layers or antireflective coatings · CPC title

  • wherein the TFTs are in active matrices · CPC title

  • H10D86/40Primary

    characterised by multiple TFTs · CPC title

  • of interconnections · CPC title

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Frequently asked questions

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What does patent US12419145B2 cover?
An integrated optical display system includes a backplane with appropriate electronics, and an array of micro-devices. A touch sensing structure may be integrated into the system. In one embodiment, an integrated circuit and system is integrated on top of micro-devices transferred to a substrate. Openings in a planarization layer (or layers) may be provided to connect the micro-devices with ele…
Who is the assignee on this patent?
Vuereal Inc
What technology area does this patent fall under?
Primary CPC classification H10D86/40. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 16 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).