Method of integrating inorganic light emitting diode with oxide thin film transistor for display applications

Patent metadata

Field	Value
Publication number	US-2016293586-A1
Application number	US-201615085128-A
Country	US
Kind code	A1
Filing date	Mar 30, 2016
Priority date	Mar 30, 2015
Publication date	Oct 6, 2016
Grant date	—

Abstract

A method of fabricating an active matrix display is disclosed in which one or more oxide thin film transistors is monolithically integrated with an inorganic light emitting diode structure. The method comprises forming an array of inorganic light emitting diodes over a substrate defining a plurality of sub-pixels, depositing an insulating layer over the inorganic LED array, forming conductive vias through the insulating layer, one via for each LED in the LED array, and forming a metal oxide thin film transistor backplane, including an array of pixel driver circuits, over the dielectric layer and conductive vias, wherein one driver circuit electrically controls each sub-pixel through the dielectric layer.

First claim

What is claimed is:

1 . A method of fabricating an active matrix display, the steps comprising:
forming an array of inorganic light emitting diodes (LEDs) over a substrate defining a plurality of sub-pixels; depositing an insulating layer over the inorganic LED array; forming conductive vias through the insulating layer, one via for each LED in the LED array; and forming a metal oxide thin film transistor backplane, including an array of pixel driver circuits, over the dielectric layer and conductive vias, wherein one driver circuit electrically controls each sub-pixel through the dielectric layer.

2 . The method of claim 1 wherein the inorganic LED array including:
a first type semiconductive layer on the substrate; and
a second or opposite type semiconductive layer formed on the first type semiconductive layer.

3 . The method of claim 2 wherein an emission layer is positioned between the first and second semiconductive layers.

4 . The method of claim 2 further comprising an n-electrode connected to the first type semiconductive layer and a p-type electrode connected to the second type semiconductive layer.

5 . The method of claim 3 wherein the first and second semiconductive layers are comprised of III-V or II-VI group semiconductor materials.

6 . The method of claim 5 wherein the III-V compound semiconductor is GaN.

7 . The method of claim 6 wherein the first type semiconductive layer is an n-type GaN semiconductor.

8 . The method of claim 7 further comprising an n-electrode connected to the n-type GaN semiconductor.

9 . The method of claim 6 wherein the second type semiconductive layer is a p-type GaN semiconductor.

10 . The method of claim 9 further comprising a p-electrode connected to the p-type GaN semiconductor.

11 . The method of claim 4 wherein the step of forming a metal oxide thin film transistor backplane over the insulating layer including:
forming a gate electrode made of a conductive material formed over a portion of the insulating layer;
depositing a gate insulating film on the gate electrode;
depositing a metal oxide semiconductor layer;
patterning the semiconductor layer to form a channel region on the gate insulating film; and
depositing a source electrode and drain electrode over the gate insulating film.

12 . The display of claim 11 further comprising:
a first conductive via plug contacting the n-electrode of the LED to the source electrode of the thin film transistor; and
a second conductive via plug contacting the p-electrode of the LED to the drain electrode of the thin film transistor.

13 . The method of claim 1 wherein the substrate is transparent.

14 . The method of claim 1 wherein the substrate is sapphire.

15 . The method of claim 1 wherein the insulating layer is silicon dioxide.

16 . A method of fabricating a light emitting device, comprising the steps of:
forming a compound stacked semiconductor structure over a substrate, wherein the semiconductor structure including:
an n-type type semiconductive layer formed on the substrate comprising a material selected from the group consisting of III-V and II-VI compounds;
a p-type semiconductive layer overlying the n-type semiconductive layer comprising a material selected from the group consisting of III-V and IV-VI compounds;
electrically coupling a first electrode with the n-type semiconductive layer; and
electrically coupling a second electrode with the p-type semiconductive layer;
forming an insulating layer comprising dielectric material over the semiconductor structure in a manner which does not cause significant damage to the structure; forming conductive vias through the insulating layer; and forming a metal oxide thin film transistor backplane over the insulating layer and conductive vias in a manner which does not cause significant damage to the semiconductor structure.

17 . The method of claim 16 wherein the step of forming a metal oxide thin film transistor backplane over the insulating layer including:
forming a gate electrode made of a conductive material formed over a portion of the insulating layer;
depositing a gate insulating film on the gate electrode;
depositing a metal oxide semiconductor layer;
patterning the semiconductor layer to form a channel region on the gate insulating film; and
depositing a source electrode and drain electrode over the gate insulating film.

18 . The method of claim 17 further comprising:
a first conductive via contacting the first electrode of the semiconductor structure to the source electrode of the thin film transistor; and
a second conductive via contacting the second electrode of the semiconductor structure to the drain electrode of the thin film transistor.

19 . The method of claim 16 wherein the conductive vias are formed by patterning by etching.

20 . A method of fabricating a light emitting device by integrating a compound stacked semiconductor structure over a substrate, wherein the semiconductor structure includes material selected from the group consisting of III-V and II-VI compounds; forming an insulating layer over the semiconductor structure; and forming a metal oxide thin film transistor backplane over the insulating layer.

21 . A device comprising a compound stacked semiconductor structure over a substrate with a metal oxide thin film transistor backplane made by the method of claim 16 .

22 . The device of claim 21 , wherein the device is a display.

23 . The device of claim 21 , wherein the display is a microdisplay.

Assignees

• Emagin Corp

Inventors

• Ghosh Amalkumar P

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• H10D99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10D30/6755

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10H20/01335

  the light-emitting regions comprising nitride materials · CPC title