Interposer, method for fabricating the same, and semiconductor package having the same

Patent metadata

Field	Value
Publication number	US-12417988-B2
Application number	US-202418643474-A
Country	US
Kind code	B2
Filing date	Apr 23, 2024
Priority date	Mar 17, 2021
Publication date	Sep 16, 2025
Grant date	Sep 16, 2025

Abstract

An interposer according to an embodiment of the present invention includes a base layer having opposite first and second surfaces, a wiring structure on the first surface of the base layer, an interposer protective layer disposed on the second surface of the base layer and having a pad recess with a lower surface of the interposer protective layer positioned at a first vertical level and a bottom surface of the pad recess positioned at a second vertical level that is higher than the first vertical level, an interposer pad of which a portion fills the pad recess of the interposer protective layer and the remaining portion protrudes from the interposer protective layer, and an interposer through electrode extending through the base layer and the interposer protective layer to the interposer pad, the interposer through electrode electrically connecting the wiring structure to the interposer pad.

First claim

What is claimed is:

1. An interposer manufacturing method comprising:
preparing a base layer having a first surface and a second surface opposite to each other, and an interposer through electrode penetrating the base layer and protruding from the second surface of the base layer;
forming an interposer protective layer covering the second surface of the base layer and having an upper surface at the same vertical level as an upper surface of the interposer through electrode;
removing a portion of the interposer protective layer to form a pad recess in which an upper portion of the interposer through electrode is exposed and a portion of the interposer protective layer is exposed on a bottom surface of the pad recess;
forming an interposer pad filling the pad recess of the interposer protective layer and protruding from the interposer protective layer; and
forming a rear wiring protective layer having a terminal opening exposing a portion of the interposer pad and covering the remaining portion of the interposer pad and the interposer protective layer.

2. The interposer manufacturing method of claim 1 , further comprising forming an alignment recess horizontally spaced apart from the pad recess and exposing a portion of a protective layer of the interposer on the bottom surface.

3. The interposer manufacturing method of claim 2 , wherein a bottom surface of the pad recess and a bottom surface of the alignment recess are formed at the same vertical level.

4. The interposer manufacturing method of claim 2 , wherein the rear wiring protective layer fills the alignment recess.

5. The interposer manufacturing method of claim 1 , wherein a thickness of the remaining portion of the interposer pad protruding from the interposer protective layer is greater than a thickness of a portion of the interposer pad filling the pad recess of the interposer protective layer.

6. The interposer manufacturing method of claim 1 , wherein the forming of the interposer protective layer comprises:
forming a lower interposer protective layer covering the second surface of the base layer; and
forming an upper interposer protective layer on the lower interposer protective layer, the upper interposer protective layer including a material different from that of the lower interposer protective layer.

7. The interposer manufacturing method of claim 6 , wherein the forming of the pad recess comprises exposing a portion of the lower interposer protective layer on a bottom surface of the pad recess,
wherein the whole lower surface of the interposer pad contacts the interposer through electrode and the lower interposer protective layer.

8. The interposer manufacturing method of claim 6 , wherein the forming of the pad recess comprises:
exposing a portion of the upper interposer protective layer and a portion of the lower interposer protective layer on the bottom surface of the pad recess; and
surrounding a side surface of the interposer through electrode with a portion of the lower interposer protective layer exposed on the bottom surface of the pad recess.

9. The interposer manufacturing method of claim 6 , wherein a maximum thickness of the lower interposer protective layer is greater than a maximum thickness of the upper interposer protective layer.

10. The interposer manufacturing method of claim 1 , wherein the interposer pad covers all of the upper portion of the interposer through electrode exposed in the pad recess.

11. The interposer manufacturing method of claim 1 , wherein the interposer protective layer is formed directly on the second surface of the base layer.

12. The interposer manufacturing method of claim 6 , wherein the forming of the pad recess comprises exposing removing a portion of the upper interposer protective layer to expose a portion of the lower interposer protective layer and removing a portion of the exposed interposer protective layer,
wherein the interposer through electrodes pass through the lower interposer protective layer and a portion of the upper interposer protective layer is disposed over the interposer through electrodes.

13. The interposer manufacturing method of claim 1 , wherein the thickness of a portion of the interposer pad above the interposer through electrodes is less than a thickness of a portion of the interposer pad that is not over the interposer through electrodes.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Park Yukyung
• Kim Ungcheon
• Lee Wonil

Classifications

• H10W74/142

  the encapsulations exposing the passive side of the semiconductor body · CPC title

• H10W90/288

  characterised by arrangements for thermal management of the stacked chips · CPC title

• H10W90/297

  characterised by the through-semiconductor vias [TSVs] in the stacked chips · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W72/944

  Dispositions of multiple bond pads · CPC title