Method of conductive material deposition

Patent metadata

Field	Value
Publication number	US-12417925-B2
Application number	US-202218070030-A
Country	US
Kind code	B2
Filing date	Nov 28, 2022
Priority date	Nov 28, 2022
Publication date	Sep 16, 2025
Grant date	Sep 16, 2025

Abstract

A method for processing a substrate that includes: depositing a filling material over the substrate including a first recess and a second recess, the filling material filling the first recess and the second recess; patterning the filling material such that the first recess is reopened while the second recess remains filled with the filling material; filling the first recess with a conductive material to a first height; etching the filling material selectively to the conductive material to reopen the second recess; filling a remainder of the first recess and the second recess with the conductive material; and performing an etch back process to etch the conductive material such that the first recess and the second recess are filled with the conductive material to a second height.

First claim

What is claimed is:

1. A method for processing a substrate, the method comprising:
depositing a filling material over the substrate comprising a first recess and a second recess, the filling material filling the first recess and the second recess;
patterning the filling material such that the first recess is reopened while the second recess remains filled with the filling material;
filling the first recess with a conductive material to a first height;
etching the filling material selectively to the conductive material to reopen the second recess;
filling a remainder of the first recess and the second recess with the conductive material; and
performing an etch back process to etch the conductive material such that the first recess and the second recess are filled with the conductive material to a second height.

2. The method of claim 1 , wherein filling the first recess with the conductive material to the first height comprises:
depositing the conductive material over the substrate, the conductive material overfilling the first recess to a height greater than the first height; and
performing an initial etch back process to etch the conductive material such that the first recess is filled with the conductive material to the first height.

3. The method of claim 1 , wherein patterning the filling material comprises a lithographic process.

4. The method of claim 3 , wherein patterning the filling material comprises:
planarizing a surface of the filling material;
depositing a layer stack over the filling material, the layer stack comprising a hardmask and a photoresist;
performing a lithographic exposure to pattern the photoresist, the pattern of the photoresist corresponding to locations of the first recess and the second recess; and
transferring the pattern to the filling material.

5. The method of claim 1 , further comprising:
prior to filling the first recess with the conductive material to the first height, forming a liner by vapor deposition; and
prior to filling the remainder of the first recess and the second recess with the conductive material, forming another liner by vapor deposition.

6. The method of claim 1 , further comprising repeating depositing the conductive material over the substrate and etching the conductive material to flatten a top surface of the conductive material.

7. The method of claim 1 , wherein the first height and the second height are essentially the same height.

8. The method of claim 1 , wherein the conductive material comprises ruthenium (Ru).

9. The method of claim 1 , wherein the filling material comprises amorphous silicon (a-Si).

10. The method of claim 1 , wherein the second height is between 20 nm and 300 nm and widths of the first recess and the second recess are between 5 nm and 50 nm.

11. A method for processing a substrate, the method comprising:
depositing a filling material over the substrate comprising line recesses, the filling material filling the line recesses;
patterning the filling material such that every other line of the line recesses is reopened while a remainder of the line recesses remains filled with the filling material;
depositing a conductive material over the substrate, the conductive material filling the reopened line recesses to a first height;
performing an etch back process to etch the conductive material such that the every other line of the line recesses is filled with the conductive material to a second height that is lower than the first height;
etching the filling material to reopen the remainder of the line recesses; and
filling every line recess with the conductive material to a third height.

12. The method of claim 11 , wherein filling every line recess with the conductive material to the third height comprises:
redepositing the conductive material over the substrate, the conductive material filling the every other line of the line recesses and the remainder of the line recesses; and
performing another etch back process to etch the conductive material such that the every line recess is filled with the conductive material to the third height.

13. The method of claim 11 , further comprising repeating depositing the conductive material over the substrate and etching the conductive material to flatten a top surface of the conductive material.

14. The method of claim 11 , wherein the conductive material comprises ruthenium (Ru), and the filling material comprises amorphous silicon (a-Si).

15. The method of claim 11 , wherein the line recesses have a height between 20 nm and 300 nm and a width between 5 nm and 50 nm.

16. The method of claim 11 , wherein the line recesses have an aspect ratio (height-to-width) between 4:1 and 20:1.

17. A method for processing a substrate, the method comprising:
depositing a first filling material over the substrate comprising a first recess and a second recess, the first filling material filling the first recess and the second recess;
patterning the first filling material such that the first recess is reopened while the second recess remains filled with the first filling material;
depositing a conductive material over the substrate, the conductive material filling the first recess to a first height;
performing a first etch back process to etch the conductive material such that the first recess is filled with the conductive material to a second height that is lower than the first height;
depositing a second filling material such that the first recess is filled with the conductive material and the second filling material;
etching the first filling material selectively to the conductive material and the second filling material to reopen the second recess;
redepositing the conductive material over the substrate, the conductive material filling the second recess; and
performing a second etch back process to etch the conductive material such that the first recess and the second recess are filled with the conductive material to the second height.

18. The method of claim 17 , wherein the first filling material comprises amorphous silicon (a-Si), wherein the second filling material comprises a silicon oxide, and wherein the conductive material comprises ruthenium (Ru).

19. The method of claim 17 , wherein patterning the first filling material comprises:
planarizing a surface of the first filling material;
depositing a layer stack over the first filling material, the layer stack comprising a hardmask and a photoresist;
performing a lithographic exposure to pattern the photoresist, the pattern of the photoresist corresponding to locations of the first recess and the second recess; and
transferring the pattern to the first filling material.

20. The method of claim 17 , wherein depositing and redepositing the conductive material are performed by chemical vapor deposition (CVD).

Assignees

• Tokyo Electron Ltd

Inventors

• Aizawa Hirokazu
• Yu Kai-Hung
• Joy Nicholas
• Yoshida Yusuke
• Tapily Kandabara

Classifications

• H10P76/4085

  characterised by the processes involved to create the masks · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/6516

  of treatments performed after formation of the materials · CPC title

• H10P14/6328

  Deposition from the gas or vapour phase · CPC title

• H10P14/416

  of highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers · CPC title