Structure containing a via-to-buried power rail contact structure or a via-to-backside power rail contact structure

Patent metadata

Field	Value
Publication number	US-12406930-B2
Application number	US-202117512744-A
Country	US
Kind code	B2
Filing date	Oct 28, 2021
Priority date	Oct 28, 2021
Publication date	Sep 2, 2025
Grant date	Sep 2, 2025

Abstract

A semiconductor structure is provided in which a via to buried power rail (VBPR) contact structure is present that has a via portion contacting a buried power rail and a non-via portion contacting a source/drain region of a first functional gate structure present in a first device region. A dielectric spacer structure including a base dielectric spacer and a replacement dielectric spacer is located between the VPBR contact structure and the first functional gate structure. The replacement dielectric spacer is composed of a gate cut trench dielectric material that is also present in a gate cut trench that is located between the first functional gate structure present in the first device region, and a second functional gate structure that is present in a second device region. The replacement dielectric spacer replaces a damaged region of a dielectric spacer that is originally present during VBPR formation.

First claim

What is claimed is:

1. A semiconductor structure comprising:
a first device region including at least one first functional gate structure;
a second device region that is located laterally adjacent to the first device region and includes at least one second functional gate structure;
a shallow trench isolation structure located between the first device region and the second device region;
a backside power rail located in a backside interconnect dielectric material layer that is located on a backside surface of the shallow trench isolation structure;
a via-to-backside power rail (VBPR) contact structure having a via portion contacting a surface of the backside power rail and a non-via portion contacting a source/drain region of the at least one first functional gate structure; and
a dielectric spacer structure located along a side of the at least one first functional gate structure that is laterally adjacent to the via portion of the via-to-backside power rail contact structure, the dielectric spacer structure comprising a base dielectric spacer and a replacement dielectric spacer, wherein another side of the at least one first functional gate structure opposite the side of the at least one first functional gate structure that is laterally adjacent to the via portion of the VBPR contact structure contains only a single dielectric spacer, wherein the single dielectric spacer is composed of a dielectric spacer material that is compositionally a same dielectric spacer material as that of the base dielectric spacer.

2. The semiconductor structure of claim 1 , further comprising a backside power distribution network located on a surface of both the backside power rail and the backside interconnect dielectric material layer.

3. The semiconductor structure of claim 1 , wherein a surface of the via-to-backside power rail contact structure contacts a back-end-of-the-line (BEOL) interconnect structure, and the BEOL interconnect structure is located on a surface of a carrier wafer.

4. The semiconductor structure of claim 1 , further comprising a source/drain contact structure contacting a source/drain region of the at least one second functional gate structure.

5. The semiconductor structure of claim 1 , wherein the at least one second functional gate structure contains only another single dielectric spacer, wherein the another single dielectric spacer is composed of a dielectric spacer material that is compositionally a same dielectric spacer material as that of the base dielectric spacer.

6. The semiconductor structure of claim 1 , wherein the at least one first functional gate structure comprises a neighboring pair of first functional gate structures, and a portion of the VBPR contact structure is present between the neighboring pair of first functional gate structures, wherein the portion of the VBPR contact structure that is located between the neighboring pair of first functional gate structures contacts a surface of the shallow trench isolation structure.

7. The semiconductor structure of claim 1 , wherein the base dielectric spacer has a first sidewall portion distal to the first functional gate structure that is perpendicular relative to a horizontal topmost surface of the shallow trench isolation structure and a second sidewall portion distal to the first functional gate structure that is tapered relative to the first sidewall portion, wherein the first sidewall portion of the base dielectric spacer and the second sidewall portion of the base dielectric spacer are in direct physical contact with the VBPR contact structure.

8. The semiconductor structure of claim 1 , further comprising a gate cut dielectric material located in a gate cut trench that is located in a region including the shallow trench isolation structure and between the first device region and the second device region, wherein a portion of the gate cut dielectric material extends above the base dielectric spacer and provides the replacement dielectric spacer, and wherein the gate cut dielectric material separates one end of the at least one first functional gate structure from one end of the at least one second functional gate structure.

9. A semiconductor structure comprising:
a first device region including at least one first functional gate structure;
a second device region that is located laterally adjacent to the first device region and includes at least one second functional gate structure;
a shallow trench isolation structure located between the first device region and the second device region;
a backside power rail located in a backside interconnect dielectric material layer that is located on a backside surface of the shallow trench isolation structure;
a via-to-backside power rail (VBPR) contact structure having a via portion contacting a surface of the backside power rail and a non-via portion contacting a source/drain region of the at least one first functional gate structure; and
a dielectric spacer structure located along a side of the at least one first functional gate structure that is laterally adjacent to the via portion of the via-to-backside power rail contact structure, the dielectric spacer structure comprising a base dielectric spacer and a replacement dielectric spacer, wherein the base dielectric spacer has a first sidewall portion distal to the first functional gate structure that is perpendicular relative to a horizontal topmost surface of the shallow trench isolation structure and a second sidewall portion distal to the first functional gate structure that is tapered relative to the first sidewall portion, wherein the first sidewall portion of the base dielectric spacer and the second sidewall portion of the base dielectric spacer are in direct physical contact with the VBPR contact structure.

10. A semiconductor structure comprising:
a first device region including at least one first functional gate structure;
a second device region that is located laterally adjacent to the first device region and includes at least one second functional gate structure;
a shallow trench isolation structure located between the first device region and the second device region;
a backside power rail located in a backside interconnect dielectric material layer that is located on a backside surface of the shallow trench isolation structure;
a via-to-backside power rail (VBPR) contact structure having a via portion contacting a surface of the backside power rail and a non-via portion contacting a source/drain region of the at least one first functional gate structure;
a dielectric spacer structure located along a side of the at least one first functional gate structure that is laterally adjacent to the via portion of the via-to-backside power rail contact structure, the dielectric spacer structure comprising a base dielectric spacer and a replacement dielectric spacer; and
a gate cut dielectric material located in a gate cut trench that is located in a region including the shallow trench isolation structure and between the first device region and the second device region, wherein a portion of the gate cut dielectric material extends above the base dielectric spacer and provides the replacement dielectric spacer, and wherein the gate cut dielectric material separates one end of the at least one first functional gate structure from one end of the at least one second functional gate structure.

Assignees

• IBM

Inventors

• Xie Ruilong
• Sieg Stuart
• Petrarca Kevin Shawn
• Miller Eric

Classifications

• H10D84/832

  comprising IGFETs having stacked nanowire, nanosheet or nanoribbon channels · CPC title

• H10D84/8316

  the IGFETs characterised by having gate sidewall spacers specially adapted for integration · CPC title

• H10D84/83

  of only insulated-gate FETs [IGFET] · CPC title

• H10W20/20

  Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title

• H10W20/0245

  comprising use of blind vias during the manufacture · CPC title