Analyzing an operation of a power semiconductor device

Patent metadata

Field	Value
Publication number	US-12345754-B2
Application number	US-202117802969-A
Country	US
Kind code	B2
Filing date	Feb 12, 2021
Priority date	Mar 2, 2020
Publication date	Jul 1, 2025
Grant date	Jul 1, 2025

Abstract

A method analyzes an operation of a power semiconductor device. The method includes: providing a set of reference voltages of the device and a set of corresponding reference currents; measuring, within a predetermined time-interval, Nframe on-state voltages and Nframe corresponding on-state currents of the device to obtain Nframe measurement points, Nframe being an integer number equal to or greater than 2; adapting the set of reference voltages by carrying out a least squares fit to the Nframe measurement points; and using the adapted set of reference voltages to analyze the operation of the power semiconductor device.

First claim

The invention claimed is:

1. A method for analyzing an operation of a power semiconductor device, the method comprising:
providing a set of reference voltages of the device and a set of corresponding reference currents;
measuring, within a predetermined time-interval, Nframe on-state voltages and Nframe corresponding on-state currents of the device to obtain Nframe measurement points, wherein Nframe is an integer number equal to or greater than 2;
adapting the set of reference voltages by carrying out a least squares fit to the Nframe measurement points; and
using the adapted set of reference voltages to analyze the operation of the power semiconductor device,
wherein for the least squares fit, a piecewise-linear approximation between each two adjacent measurement points is assumed.

2. The method according to claim 1 , wherein the analyzing comprises estimating a junction temperature of the device based on the adapted set of reference voltages.

3. A method for analyzing an operation of a power semiconductor device, the method comprising:
providing a set of reference voltages of the device and a set of corresponding reference currents;
measuring, within a predetermined time-interval, Nframe on-state voltages and Nframe corresponding on-state currents of the device to obtain Nframe measurement points, wherein Nframe is an integer number equal to or greater than 2;
adapting the set of reference voltages by carrying out a least squares fit to the Nframe measurement points; and
using the adapted set of reference voltages to analyze the operation of the power semiconductor device,

wherein the least squares fit comprises:
defining a validity factor for each of the reference currents, wherein the validity factors represent how near a measured on-state current is to each of the reference currents;
determining a set of validity factors for each of the measurement points resulting in Nframe sets of validity factors.

4. The method according to claim 3 , wherein the validity factors are defined in such a way that a validity factor associated with a certain reference current equals 1 upon the measured on-state current equaling the reference current, while the validity factor associated with the reference current equals 0 upon the measured on-state current equaling an adjacent reference current.

5. The method according to claim 3 , wherein for a measurement point within the predefined time-interval, the validity factors are defined by the following set of equations:

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Assignees

• Reinhausen Maschf Scheubeck

Inventors

• Bryant Angus

Classifications

• G01R31/263

  for testing thyristors · CPC title

• G01R31/2628

  for measuring thermal properties thereof · CPC title

• G01R31/2619

  for measuring thermal properties thereof · CPC title

• G01R31/2603

  for curve tracing of semiconductor characteristics, e.g. on oscilloscope · CPC title

• G01R31/2632

  for testing diodes · CPC title