Current measuring circuit

Patent metadata

Field	Value
Publication number	US-12292469-B2
Application number	US-202218061168-A
Country	US
Kind code	B2
Filing date	Dec 2, 2022
Priority date	Dec 21, 2021
Publication date	May 6, 2025
Grant date	May 6, 2025

Abstract

A circuit includes a power transistor having a main current path between a first supply node and an output pin for connecting a load. A resistance formed by a chip metallization is arranged between the main current path of the power transistor and the output pin. The circuit includes a current measuring circuit coupled to the power transistor and including a sense transistor coupled to the power transistor. The current measuring circuit delivers a measurement current representing a load current flowing through the power transistor. An amplifier circuit generates an amplifier output signal representing the voltage across the resistance, and a control circuit outputs a signal representing the measurement current in a first mode and a signal dependent on the amplifier output signal in a second mode.

First claim

What is claimed is:

1. A circuit comprising:
a power transistor having a main current path connected between a first supply node and an output pin for connecting a load, wherein a resistance formed by a chip metallization is coupled in series between the main current path of the power transistor and the output pin;
a current measuring circuit coupled to the power transistor and comprising a sense transistor coupled to the power transistor, wherein the current measuring circuit is configured to deliver a measurement current representing a load current flowing through the power transistor;
an amplifier circuit configured to generate an amplifier output signal representing a voltage across the resistance; and
a control circuit configured, by electronic switches, to output a signal representing the measurement current in a first mode and a signal dependent on the amplifier output signal in a second mode.

2. The circuit as claimed in claim 1 ,
wherein the control circuit is configured to output the measurement current in the first mode and an output current of the amplifier circuit in the second mode.

3. The circuit as claimed in claim 1 ,
wherein the control circuit is configured, with a communication interface, to output a digital value representing the measurement current in the first mode and representing the voltage across the resistance or a resistance value of the resistance in the second mode.

4. The circuit as claimed in claim 1 ,
wherein the resistance formed by the chip metallization is not a locally embodied resistance, but rather is distributed over the chip metallization.

5. The circuit as claimed in claim 1 ,
wherein the resistance formed by the chip metallization is formed by that part of the metallization which, during operation of the power transistor, is exposed to thermal loading.

6. The circuit as claimed in claim 1 ,
wherein a first terminal of the resistance is arranged in a vicinity of a chip contact location and a second terminal of the resistance is arranged in a vicinity of the control circuit.

7. The circuit as claimed in claim 6 ,
wherein a distance between the first terminal of the resistance and a bond wire contact location is smaller than three layer thicknesses of the chip metallization, and
wherein a distance between the second terminal of the resistance and the control circuit is smaller than three layer thicknesses.

8. The circuit as claimed in claim 1 ,
wherein the chip metallization has a layer thickness of 2-50 μm.

9. The circuit as claimed in claim 1 ,
wherein the current measuring circuit comprises an output transistor coupled to the sense transistor such that substantially the measurement current flows through the sense transistor and the output transistor; and
wherein the current measuring circuit comprises an operational amplifier configured to drive the output transistor such that the power transistor and the sense transistor are operated substantially at the same operating point.

10. The circuit as claimed in claim 1 ,
wherein the current measuring circuit comprises an output transistor coupled to the sense transistor such that substantially the measurement current flows through the sense transistor and the output transistor; and
wherein the current measuring circuit comprises an operational amplifier configured to drive the output transistor such that the measurement current is substantially proportional to a load current through the power transistor.

11. The circuit as claimed in claim 9 ,
wherein the operational amplifier is part of the amplifier circuit in the second mode; and
wherein the control circuit is furthermore configured, in the second mode, to couple the operational amplifier to the resistance such that the operational amplifier amplifies the voltage across the resistance.

12. The circuit as claimed in claim 1 ,
wherein the control circuit is furthermore configured to receive a diagnosis signal via a communication connection and to switch to the first or the second mode depending on the diagnosis signal.

13. A method comprising:
providing a measurement current by a current measuring circuit comprising a sense transistor coupled to a power transistor,
outputting a signal representing the measurement current in a first mode of an integrated circuit containing the power transistor and the sense transistor;
amplifying a voltage across a resistance coupled in series between a main current path of the power transistor and an output pin coupled to a load, wherein the resistance is formed by a chip metallization, and the amplified voltage represents a voltage across the resistance; and
outputting a signal representing the amplified voltage in a second mode of the integrated circuit.

14. The method as claimed in claim 13 ,
wherein the measurement current is output at a sense pin in the first mode, and wherein a current representing the voltage across the resistance is output at the sense pin in the second mode.

15. The method as claimed in claim 13 , furthermore comprising:
receiving a diagnosis signal via a communication connection; and
switching to the first or the second mode depending on the diagnosis signal.

16. The method as claimed in claim 13 , furthermore comprising:
determining a first value representing the measurement current in the first mode; and
determining a second value representing the voltage across the resistance in the second mode, and
determining a measurement value representing the resistance based on the first and second values.

17. The method as claimed in claim 16 ,
wherein the measurement value indicates a degradation of the chip metallization.

18. An integrated circuit comprising:
a power transistor;
an output pin configured to be coupled to a load external to the integrated circuit;
a metallization resistance coupled between an output node of the power transistor and the output pin;
a sense transistor having a control node coupled to a control node of the power transistor;
an amplifier having a first input coupled to an output node of the sense transistor and a second input coupled to the output pin;
a first transistor having a control node coupled to an output of the amplifier and a first load path node coupled to the output node of the sense transistor;
a measurement resistor coupled to a second load path node of the first transistor;
a transconductance amplifier having inputs connected across the metallization resistance;
a first switch coupled between the output node of the sense transistor and the first load path node of the first transistor; and
a second switch coupled between an output node of the transconductance amplifier and the measurement resistor.

19. The circuit as claimed in claim 18 , further comprising a control circuit configured to:
activate the first switch and deactivate the second switch during a first mode, wherein a current proportional to a current provided by the power transistor is configured to flow though the measurement resistor during the first mode; and
activate the second switch and deactivate the first switch during a second mode, wherein a current proportional to a voltage across the metallization resistance is configured to flow though the measurement resistor during the second mode.

20. The circuit of claim 18 , wherein the power transistor, the sense transistor, the first transistor, the first switch and the second switch comprise metal oxide semiconductor transistors.

Assignees

• Infineon Technologies Ag

Inventors

• Djelassi-Tscheck Christian
• Boianceanu Cristian Mihai
• Nelhiebel Michael

Classifications

• G01R31/2856

  Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM] · CPC title

• G01R19/16519

  using FET's · CPC title

• G01R27/02

  Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant (by measuring phase angle only G01R25/00) · CPC title

• G01R19/25

  using digital measurement techniques · CPC title

• G01R31/2879 Primary

  related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads · CPC title