Integrating voltage regulators and passive circuit elements with top side power planes in stacked die architectures

Patent metadata

Field	Value
Publication number	US-12242290-B2
Application number	US-202117484286-A
Country	US
Kind code	B2
Filing date	Sep 24, 2021
Priority date	Sep 24, 2021
Publication date	Mar 4, 2025
Grant date	Mar 4, 2025

Abstract

In one embodiment, an apparatus includes a first die with voltage regulator circuitry and a second die with logic circuitry. The apparatus further includes an inductor, a capacitor, and a conformal power delivery structure on the top side of the apparatus, where the voltage regulator circuitry is connected to the logic circuitry through the inductor, the capacitor, and the conformal power delivery structure. The conformal power delivery structure includes a first electrically conductive layer defining one or more recesses, a second electrically conductive layer at least partially within the recesses of the first electrically conductive layer and having a lower surface that generally conforms with the upper surface of the first electrically conductive layer, and a dielectric material between the surfaces of the first electrically conductive layer and the second electrically conductive layer that conform with one another.

First claim

The invention claimed is:

1. A stacked die apparatus comprising:
a first die comprising voltage regulator circuitry;
a second die comprising logic circuitry;
an inductor;
a capacitor; and
a conformal power delivery structure, the conformal power delivery structure comprising:
a first electrically conductive layer comprising metal, the first electrically conductive layer defining one or more recesses;
a second electrically conductive layer comprising metal, the second electrically conductive layer at least partially within the recesses of the first electrically conductive layer and having a lower surface that generally conforms with the upper surface of the first electrically conductive layer; and
a dielectric material between the surfaces of the first electrically conductive layer and the second electrically conductive layer that conform with one another;

wherein the voltage regulator circuitry of the first die is connected to the logic circuitry of the second die through the inductor, the capacitor, and the conformal power delivery structure.

2. The apparatus of claim 1 , further comprising a third die comprising logic circuitry, wherein the voltage regulator circuitry of the first die is connected to the logic circuitry of the third die through the inductor, capacitor, and conformal power delivery structure.

3. The apparatus of claim 1 , further comprising a third die, wherein the capacitor is a metal-in-metal capacitor within the third die.

4. The apparatus of claim 3 , wherein the third die is above the second die in the stacked die architecture.

5. The apparatus of claim 1 , wherein the capacitor is within a fill material of the stacked die apparatus.

6. The apparatus of claim 1 , wherein the inductor is in series with the logic circuitry of the second die and the capacitor is in parallel with the logic circuitry of the second die.

7. The apparatus of claim 1 , wherein the voltage regulator circuitry of the first die comprises circuitry to receive an input voltage signal and provide an output voltage to the inductor, capacitor, and the logic circuitry of the first die, wherein the circuitry is to generate the output voltage based on the input voltage.

8. The apparatus of claim 1 , wherein the conformal power delivery structure is on an upper surface of the stacked die apparatus.

9. The apparatus of claim 1 , wherein the conformal power delivery structure is a first conformal power delivery structure, and the apparatus further comprises a second conformal power delivery structure within the stacked die apparatus, the second conformal power delivery structure comprising:
a third electrically conductive layer comprising metal, the third electrically conductive layer defining one or more recesses;
a fourth electrically conductive layer comprising metal, the fourth electrically conductive layer at least partially within the recesses of the third electrically conductive layer and having a lower surface that generally conforms with the upper surface of the third electrically conductive layer; and
a dielectric material between the surfaces of the third electrically conductive layer and the fourth electrically conductive layer that conform with one another.

10. A system comprising:
a package substrate comprising a power plane structure; and
a stacked die apparatus connected to the package substrate, the stacked die apparatus comprising:
a first die comprising voltage regulator circuitry, the voltage regulator circuitry comprising circuitry to receive an input from the package substrate and provide an output based on the input;
a second die comprising logic circuitry;
a conformal power delivery structure on a surface of the stacked die apparatus opposite the package substrate, the conformal power delivery structure comprising:
a first electrically conductive layer comprising metal, the first electrically conductive layer defining one or more recesses;
a second electrically conductive layer comprising metal, the second electrically conductive layer at least partially within the recesses of the first electrically conductive layer and having a lower surface that generally conforms with the upper surface of the first electrically conductive layer; and
a dielectric material between the surfaces of the first electrically conductive layer and the second electrically conductive layer that conform with one another;

an inductor connected to the output voltage regulator circuitry;
a capacitor connected to the inductor and the logic circuitry of the second die; and
a thermal interface material layer on the conformal power delivery structure of the stacked die apparatus; and
a heat sink on the thermal interface material;
wherein the conformal power delivery structure connected to at least one of the voltage regulator circuitry, the inductor, the capacitor, and the logic circuitry.

11. The system of claim 10 , wherein the power plane structure of the package substrate comprises a parallel power plane structure.

12. The system of claim 10 , wherein the conformal power delivery structure is a first conformal power delivery structure, and the power plane structure of the package substrate comprises a second conformal power delivery structure comprising:
a third electrically conductive layer comprising metal, the third electrically conductive layer defining one or more recesses;
a fourth electrically conductive layer comprising metal, the fourth electrically conductive layer at least partially within the recesses of the third electrically conductive layer and having a lower surface that generally conforms with the upper surface of the third electrically conductive layer; and
a dielectric material between the surfaces of the third electrically conductive layer and the fourth electrically conductive layer that conform with one another.

13. The system of claim 10 , wherein the voltage regulator circuitry of the first die is further connected to the logic circuitry of the second die through the power plane structure of the package substrate.

14. The system of claim 13 , wherein the first die is below the second die in the stacked die apparatus.

15. The system of claim 10 , wherein the inductor is at least partially within the heat sink.

16. The system of claim 10 , wherein the inductor is at least partially within the package substrate.

17. The system of claim 10 , wherein the inductor is in series with the logic circuitry of the second die and the capacitor is in parallel with the logic circuitry of the second die.

18. The system of claim 10 , wherein the capacitor is within a fill material of the stacked die apparatus.

19. The system of claim 10 , wherein the stacked die apparatus further comprises a third die, and the capacitor is within the third die.

20. The system of claim 10 , further comprising a circuit board connected to the package substrate.

Assignees

• Intel Corp

Inventors

• Choi Beomseok
• Lambert William J
• Bharath Krishna
• Radhakrishnan Kaladhar
• Elsherbini Adel
• Braunisch Henning
• Morein Stephen
• Aleksov Aleksandar
• Eid Feras

Classifications

• H10W90/00

  Package configurations · CPC title

• H10W72/00

  Interconnections or connectors in packages · CPC title

• H10W44/501

  Inductive arrangements (H10W44/20 takes precedence) · CPC title

• H10W90/701

  characterised by the relative positions of pads or connectors relative to package parts · CPC title

• H10W70/635

  Through-vias · CPC title