Showerhead device for semiconductor processing system

Patent metadata

Field	Value
Publication number	US-12237182-B2
Application number	US-202418589252-A
Country	US
Kind code	B2
Filing date	Feb 27, 2024
Priority date	Jul 18, 2019
Publication date	Feb 25, 2025
Grant date	Feb 25, 2025

Abstract

To create constant partial pressures of the by-products and residence time of the gas molecules across the wafer, a dual showerhead reactor can be used. A dual showerhead structure can achieve spatially uniform partial pressures, residence times and temperatures for the etchant and for the by-products, thus leading to uniform etch rates across the wafer. The system can include differential pumping to the reactor.

First claim

The invention claimed is:

1. A semiconductor processing apparatus, comprising: a reaction chamber and a first exhaust port, the first exhaust port configured to remove vapors from the reaction chamber; a device connected to the reaction chamber and configured to deliver reactant vapors to the reaction chamber, the device comprising: a gas inlet configured to supply the reactant vapors into the device; a first plate in fluid communication with the gas inlet, the first plate comprising a plurality of openings; and a second plate comprising: a plurality of inlet ports in fluid communication with the plurality of openings, the plurality of inlet ports configured to deliver the reactant vapors to the reaction chamber; and a plurality of second exhaust ports configured to remove vapors from the reaction chamber; and a plurality of pumps connected to the first exhaust port and a plurality of outlet apertures, the plurality of pumps configured to remove vapors from the reaction chamber through the first exhaust port and the plurality of outlet apertures at a plurality of pumping speeds, the plurality of pumps configured to modulate the plurality of pumping speeds, wherein the apparatus does not comprise a plasma source, and wherein the ratio of pumping speed of gases through the plurality of outlet apertures to pumping speed of gases through the first exhaust port in the reaction chamber is in a range of 100:1 to 1:100.

2. The semiconductor processing apparatus of claim 1 , further comprising a susceptor within the reaction chamber facing the device.

3. The semiconductor processing apparatus of claim 2 , further comprising a motor drive connected to the susceptor, the motor drive configured to adjust the distance between the susceptor and the device.

4. The semiconductor processing apparatus of claim 3 , further comprising a control system in electrical communication with the motor drive, the control system configured to adjust the distance between the susceptor and the device during etching.

5. The semiconductor processing apparatus of claim 1 , further comprising a control system configured to deliver an etch reactant from an etch reactant source to the reaction chamber.

6. A semiconductor processing apparatus, comprising: a reaction chamber and a first exhaust port, the first exhaust port configured to remove vapors from the reaction chamber; a device connected to the reaction chamber and configured to deliver reactant vapors to the reaction chamber, the device comprising: a gas inlet configured to supply the reactant vapors into the device; a first plate in fluid communication with the gas inlet, the first plate comprising a plurality of openings; and a second plate comprising: a plurality of inlet ports in fluid communication with the plurality of openings, the plurality of inlet ports configured to deliver the reactant vapors to the reaction chamber; and a plurality of second exhaust ports configured to remove vapors from the reaction chamber; a plurality of pumps connected to the first exhaust port and a plurality of outlet apertures, the plurality of pumps configured to remove vapors from the reaction chamber through the first exhaust port and the plurality of outlet apertures at a plurality of pumping speeds, the plurality of pumps configured to modulate the plurality of pumping speeds; and a control system configured to deliver an etch reactant from an etch reactant source to the reaction chamber, wherein the apparatus does not comprise a plasma source, and wherein the control system is configured to: deliver the etch reactant to a substrate conformally such that etch conformality is greater than 50%, or deliver the etch reactant to a substrate selectively such that etch selectivity is greater than 10%.

7. The semiconductor processing apparatus of claim 1 , further comprising an inlet manifold, the inlet manifold disposed between the gas inlet and a plenum.

8. The semiconductor processing apparatus of claim 6 , wherein the ratio of pumping speed of gases through the plurality of outlet apertures to pumping speed of gases through the first exhaust port in the reaction chamber is in a range of 100:1 to 1:100.

9. The semiconductor processing apparatus of claim 1 , wherein the plurality of pumping speeds independently range from about 25 m 3 /h to about 5000 m 3 /h.

10. The semiconductor processing apparatus of claim 1 , wherein the device is a showerhead device.

11. The semiconductor processing apparatus of claim 1 , wherein the gas inlet comprises a plurality of branched inlet lines to deliver the reactant vapors to the first plate.

12. A method, which is performed in the semiconductor processing apparatus of claim 1 , for etching a layer, the method comprising
providing a substrate into the reaction chamber, the substrate comprising an etchable layer on a surface of the substrate; and
providing a reactant vapor into the reaction chamber to etch the surface.

13. The method according to claim 12 , further comprising conveying the reactant vapor to the reaction chamber through a plurality of distributed inlet apertures in the device.

14. The method according to claim 12 , further comprising removing vapors from the reaction chamber by way of the first exhaust port.

15. The method according to claim 12 , further comprising removing vapor from the reaction chamber by way of the plurality of second exhaust ports.

16. The method according to claim 12 , wherein providing the reactant vapor into the reaction chamber to etch the surface comprises providing etch reactant to a substrate conformally such that etch conformality is greater than 50%.

17. The method according to claim 12 , wherein providing the reactant vapor into the reaction chamber to etch the surface comprises providing etch reactant to the substrate selectively such that etch selectivity is greater than 10%.

18. The semiconductor processing apparatus of claim 6 , wherein the plurality of pumping speeds independently range from about 25 m 3 /h to about 5000 m 3 /h.

19. The semiconductor processing apparatus of claim 6 , wherein the device is a showerhead device.

20. The semiconductor processing apparatus of claim 6 , wherein the gas inlet comprises a plurality of branched inlet lines to deliver the reactant vapors to the first plate.

Assignees

• Asm Ip Holding Bv

Inventors

• Blomberg Tom E
• Sharma Varun

Classifications

• H10P50/242

  of Group IV materials · CPC title

• H10P72/0418 Primary

  for etching · CPC title

• H10P72/0468

  comprising a chamber adapted to a particular process · CPC title

• H10P72/0402

  Apparatus for fluid treatment (H10P72/0441, H10P72/0448 take precedence) · CPC title

• H10P72/0424 Primary

  using mainly spraying means, e.g. nozzles · CPC title