Semiconductor device with depression in package and method for manufacturing same

US12178135B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12178135-B2
Application numberUS-202217685436-A
CountryUS
Kind codeB2
Filing dateMar 3, 2022
Priority dateSep 12, 2019
Publication dateDec 24, 2024
Grant dateDec 24, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes a base, a detector on the base and including a first surface on which a detection portion is provided, and a resin package on the base and including an exposure hole to externally expose the detection portion of the detector. At least a portion of an outer peripheral edge of the first surface of the detector is exposed in the exposure hole. The resin package includes a depressed portion along the portion of the outer peripheral edge that is exposed in the exposure hole.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a base; a detector on the base and including a first surface on which a detection portion is provided; and a resin package on the base and including an exposure hole to externally expose the detection portion of the detector; wherein at least a portion of an outer peripheral edge of the first surface of the detector is exposed in the exposure hole; the resin package includes a depressed portion along the portion of the outer peripheral edge that is exposed in the exposure hole; at least a portion of the detector is buried in the resin package; and the depressed portion is depressed with respect to the portion of the outer peripheral edge that is exposed in the exposure hole. 2. The semiconductor device according to claim 1 , wherein the detector includes a connection terminal on the first surface and adjacent to a portion of the outer peripheral edge; a portion of the outer peripheral edge other than the portion adjacent to the connection terminal is exposed in the exposure hole; and the connection terminal is covered by the resin package. 3. The semiconductor device according to claim 2 , wherein the detector includes a groove in a portion between the detection portion and the connection terminal on the first surface. 4. The semiconductor device according to claim 1 , wherein the detector includes a connection terminal on a second surface on a side opposite to the first surface; the outer peripheral edge of the first surface of the detector is exposed in the exposure hole; and the depressed portion is an annular depressed portion along the outer peripheral edge exposed in the exposure hole. 5. The semiconductor device according to claim 1 , further comprising a circuit provided on the base and buried in the resin package. 6. The semiconductor device according to claim 5 , wherein the circuit is fixed to the base with an adhesive. 7. The semiconductor device according to claim 6 , wherein the adhesive is a die attach film or a die bond material. 8. The semiconductor device according to claim 5 , wherein the circuit includes an application specific integrated circuit. 9. The semiconductor device according to claim 5 , wherein the circuit includes a signal processing circuit configured or programmed to process a signal output from the detector and output the processed signal to the base. 10. The semiconductor device according to claim 1 , wherein the base includes a wiring substrate. 11. The semiconductor device according to claim 10 , wherein the wiring substrate is a ceramic substrate or a resin substrate. 12. The semiconductor device according to claim 1 , wherein the detector includes a pressure sensor. 13. The semiconductor device according to claim 1 , wherein the detector includes a piezoresistive pressure sensor or an electrostatic capacitive pressure sensor. 14. A semiconductor device comprising: a base; a detector on the base and including a first surface on which a detection portion is provided; and a resin package on the base and including an exposure hole to externally expose the detection portion of the detector; wherein at least a portion of an outer peripheral edge of the first surface of the detector is exposed in the exposure hole; the resin package includes a depressed portion along the portion of the outer peripheral edge that is exposed in the exposure hole; the resin package includes a main body portion on the base and a cylindrical ring holding portion in a central portion of a surface of the main body portion on a side opposite to the base, the cylindrical ring holding portion including, at a top surface thereof, an opening of the exposure hole; the base further includes, on a surface of the base on a side opposite to the resin package, a plurality of external connection terminals around a center line of the ring holding portion; and in a top view of the base, each of the plurality of external connection terminals is at least partially located in an outer side portion of a periphery of the ring holding portion. 15. A method of manufacturing a semiconductor device in which, on a base on which a detector including a first surface on which a detection portion is located is provided, a resin package that includes an exposure hole to externally expose the detection portion of the detector is provided, the method comprising: bringing a mold release film into close contact with a mold that includes a cavity with a projection; placing the mold with respect to the base such that the first surface of the detector sinks into a portion of the mold release film that is located on a top surface of the projection; filling the cavity of the mold with a melted resin material; separating the mold and the mold release film from the resin package that includes a solidified resin material; and positioning an outer peripheral edge of the top surface of the projection so that, in a view from a direction in which the projection of the mold and the first surface of the detector face each other, the outer peripheral edge is at least partially positioned in an outer side portion of an outer peripheral edge of the first surface. 16. The method of manufacturing a semiconductor device according to claim 15 , wherein the detector includes a connection terminal on the first surface so as to be adjacent to a portion of the outer peripheral edge; and in the view from the direction in which the projection of the mold and the first surface of the detector face each other, the outer peripheral edge of the top surface of the projection is partially located in an outer side portion of a portion of the outer peripheral edge of the first surface other than the portion adjacent to the connection terminal. 17. The method of manufacturing a semiconductor device according to claim 16 , wherein the detector includes a groove in a portion between the detection portion and the connection terminal on the first surface. 18. The method of manufacturing a semiconductor device according to claim 15 , wherein the detector includes a connection terminal on a second surface on a side opposite to the first surface; and in the view from the direction in which the projection of the mold and the first surface of the detector face each other, the outer peripheral edge of the top surface of the projection is entirely or substantially entirely located in the outer side portion of the outer peripheral edge of the first surface.

Assignees

Inventors

Classifications

  • Insulating materials, e.g. resins, glasses or ceramics · CPC title

  • Containers or parts thereof · CPC title

  • Manufacture or treatment · CPC title

  • characterised by their shape · CPC title

  • H10W74/111Primary

    the semiconductor body being completely enclosed · CPC title

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Frequently asked questions

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What does patent US12178135B2 cover?
A semiconductor device includes a base, a detector on the base and including a first surface on which a detection portion is provided, and a resin package on the base and including an exposure hole to externally expose the detection portion of the detector. At least a portion of an outer peripheral edge of the first surface of the detector is exposed in the exposure hole. The resin package incl…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H10W74/111. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 24 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).