Power module

US12107023B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12107023-B2
Application numberUS-202117473196-A
CountryUS
Kind codeB2
Filing dateSep 13, 2021
Priority dateFeb 17, 2021
Publication dateOct 1, 2024
Grant dateOct 1, 2024

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A power module includes a base plate, a casing, a substrate unit, a terminal plate, a first resin layer, and a second resin layer. The substrate unit includes a substrate fixed on the base plate, a dam part, a semiconductor chip, a metal member, and a wire. The dam part is formed along an edge of the substrate. The wire includes an electrode plate connection portion, and a chip connection portion. The first resin layer is located inward of the dam part. The chip connection portion and the electrode plate connection portion are located inside the first resin layer. The second resin layer is located on the first resin layer. The upper surface of the metal member is located inside the second resin layer. An elastic modulus of the second resin layer is less than that of the first resin layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A power module, comprising: a base plate; a casing located on the base plate; at least one substrate unit located on the base plate, each of the at least one substrate unit including a substrate fixed on the base plate, the substrate including a plurality of electrode plates at an upper surface of the substrate, the plurality of electrode plates including at least first and second electrode plates, a dam part located on the substrate, the dam part being formed along an edge of the substrate when viewed from above, a first semiconductor chip located on the first electrode plate, the first semiconductor chip including a first electrode, a metal member located on one of the electrode plates, and a first wire including an electrode plate connection portion connected to the second electrode plate, a chip connection portion connected to the first electrode, and a curved portion positioned between the electrode plate connection portion and the chip connection portion; a terminal plate bonded to an upper surface of the metal member, the terminal plate including a bonding portion connected to the upper surface of the metal member and being parallel to the upper surface of the metal member, a curved portion being linked to the bonding portion and being curved upward from a direction parallel to the upper surface of the metal member, an interconnect portion being linked to the curved portion, and a draw-out portion being linked to the interconnect portion; a first resin layer located on the substrate inward of the dam part, the chip connection portion and the electrode plate connection portion being located inside the first resin layer; and a second resin layer located on the first resin layer and the dam part, the upper surface of the metal member being located inside the second resin layer, an elastic modulus of the second resin layer being less than an elastic modulus of the first resin layer, wherein a height of the dam part from an upper surface of the substrate is greater than a height of the chip connection portion from the upper surface of the substrate, a height of the first resin layer from the upper surface of the substrate is not more than the height of the dam part, is greater than the height of the chip connection portion, and is less than a height of the upper surface of the metal member from the upper surface of the substrate, a part of the second resin layer is located between the upper surface of the metal member and the curved portion of the terminal plate, the terminal plate is monolithically formed, and the draw-out portion of the terminal plate reaches to an uppermost surface of the casing, is exposed on the uppermost surface of the casing, and is not covered by the second resin layer. 2. The power module according to claim 1 , wherein the casing includes a side surface portion, and the second resin layer contacts the base plate in a gap between the substrate unit and the side surface portion. 3. The power module according to claim 1 , wherein an elastic modulus of the dam part is greater than the elastic modulus of the second resin layer and less than the elastic modulus of the first resin layer. 4. The power module according to claim 1 , wherein the dam part includes a silicone resin, and the dam part includes at least two bulges and one pinched-in portion. 5. The power module according to claim 1 , wherein the curved portion is located inside the second resin layer. 6. The power module according to claim 1 , wherein a thermal expansion coefficient of the first resin layer is less than a thermal expansion coefficient of the second resin layer. 7. The power module according to claim 1 , wherein the first resin layer includes an epoxy resin. 8. The power module according to claim 1 , wherein the second resin layer is a gel. 9. The power module according to claim 1 , comprising: two of the substrate units, one of the substrate units and the other of the substrate units being separated from each other on the base plate, and the second resin layer contacting the base plate in a gap between the two substrate units. 10. The power module according to claim 9 , further comprising: a second wire, the one of the substrate units and the other of the substrate units further including second semiconductor chips located on one of the plurality of electrode plates of the one of the substrate units and the other of the substrate units, each of the second semiconductor chips including a second electrode, one end of the second wire being connected to the one of the plurality of electrode plates or the second electrode of the one of the substrate units, another end of the second wire being connected to the one of the plurality of electrode plates or the second electrode of the other of the substrate units, and a middle portion of the second wire being located in the second resin layer.

Assignees

Inventors

Classifications

  • between a chip and a laterally-adjacent insulating package substrate, interpose or RDL · CPC title

  • by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation · CPC title

  • by a substrate and the encapsulations · CPC title

  • Ceramics or glasses · CPC title

  • Conductive package substrates serving as an interconnection, e.g. metal plates (leadframes H10W70/40) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12107023B2 cover?
A power module includes a base plate, a casing, a substrate unit, a terminal plate, a first resin layer, and a second resin layer. The substrate unit includes a substrate fixed on the base plate, a dam part, a semiconductor chip, a metal member, and a wire. The dam part is formed along an edge of the substrate. The wire includes an electrode plate connection portion, and a chip connection porti…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10W76/15. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).