Structure to reduce chip shift during assembly
US-2024395758-A1 · Nov 28, 2024 · US
US2021090974A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2021090974-A1 |
| Application number | US-202016926008-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jul 10, 2020 |
| Priority date | Sep 24, 2019 |
| Publication date | Mar 25, 2021 |
| Grant date | — |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A power module includes: a base plate having a first surface; electrode plate provided at the first surface; a wire connected to a semiconductor chip and the electrode plate; a metal member connected to the electrode plate; a terminal plate; a first resin layer, a connection portion of the wire and the semiconductor chip being disposed inside the first resin layer; and a second resin layer provided on the first resin layer and having a lower elastic modulus than the first resin layer. The terminal plate includes a bonding portion contacting an upper surface of the metal member, a curved portion curved upward from the bonding portion. The curved portion is disposed inside the second resin layer, and a length from the first surface of a lower surface of the bonding portion is greater than a length from the first surface of the connection portion.
Opening claim text (preview).
What is claimed is: 1 . A power module, comprising: a base plate having a first surface; a plurality of electrode plates provided at the first surface; a semiconductor chip provided on the first surface; a wire connected to the semiconductor chip and one of the electrode plates; a metal member connected to one of the electrode plates; a terminal plate including a bonding portion, a curved portion, and a draw-out portion, the bonding portion contacting an upper surface of the metal member and extending along the upper surface, the curved portion being curved upward from the bonding portion, the draw-out portion being drawn out externally from the curved portion; a first resin layer, a connection portion of the wire and the semiconductor chip being disposed inside the first resin layer; and a second resin layer provided on the first resin layer, the curved portion being disposed inside the second resin layer, an elastic modulus of the second resin layer being less than an elastic modulus of the first resin layer, a length from the first surface of a lower surface of the bonding portion being greater than a length from the first surface of the connection portion. 2 . The module according to claim 1 , wherein an upper surface of the first resin layer is positioned higher than the connection portion and positioned lower than the bonding portion. 3 . The module according to claim 1 , wherein a connection effect portion has reduced bendability, and is formed at an end portion of the wire at the connection portion side by connecting the connection portion and the semiconductor chip, and the length from the first surface of the lower surface of the bonding portion is greater than a length from the first surface of an upper end of the connection effect portion. 4 . The module according to claim 3 , wherein the upper surface of the first resin layer is positioned higher than the upper end of the connection effect portion. 5 . The module according to claim 1 , further comprising a bonding member contacting the metal member and the one of the electrode plates. 6 . The module according to claim 1 , wherein a thermal expansion coefficient of the first resin layer is less than a thermal expansion coefficient of the second resin layer. 7 . The module according to claim 1 , wherein the first resin layer includes an epoxy resin. 8 . The module according to claim 1 , wherein the second resin layer is a gel.
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
using a polymer adhesive, e.g. an adhesive based on silicone or epoxy · CPC title
Die-attach connectors and bond wires · CPC title
Package configurations · CPC title
by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.