Semiconductor Module and Method for Producing the Same

Patent metadata

Field	Value
Publication number	US-2019189553-A1
Application number	US-201816220956-A
Country	US
Kind code	A1
Filing date	Dec 14, 2018
Priority date	Dec 15, 2017
Publication date	Jun 20, 2019
Grant date	—

Abstract

A power semiconductor module arrangement including two or more individual semiconductor devices each semiconductor device having a lead frame, a semiconductor body arranged on the lead frame, and a molding material enclosing the semiconductor body and at least part of the lead frame. The power semiconductor module arrangement further includes a frame surrounding the two or more individual semiconductor devices, and a casting compound at least partly filling a capacity within the frame, thereby at least partly enclosing the two or more individual semiconductor devices.

First claim

What is claimed is:

1 . A power semiconductor module arrangement, comprising:
two or more individual semiconductor devices each comprising a lead frame, a semiconductor body arranged on the lead frame and a molding material enclosing the semiconductor body and at least part of the lead frame; a frame surrounding the two or more individual semiconductor devices; and a casting compound at least partly filling a capacity within the frame, thereby at least partly enclosing the two or more individual semiconductor devices.

2 . The power semiconductor module arrangement of claim 1 , further comprising:
a heat sink, wherein the casting compound with the two or more individual semiconductor devices enclosed in the casting compound is mounted to the heat sink, wherein the heat sink and the frame together form a housing of the power semiconductor module arrangement, wherein the heat sink forms a bottom of the housing and the frame forms sidewalls of the housing.

3 . The power semiconductor module arrangement of claim 2 , further comprising a layer of electrically isolating material arranged between the lead frames and the heat sink.

4 . The power semiconductor module arrangement of claim 1 , wherein each lead frame comprises a first leg and a second leg, wherein the semiconductor body of each individual semiconductor device is arranged on the first leg of the respective lead frame, and wherein the second leg of each lead frame is essentially perpendicular to the first leg of the corresponding lead frame.

5 . The power semiconductor module arrangement of claim 4 , wherein the second legs of the individual lead frames protrude from the casting compound.

6 . The power semiconductor module arrangement of claim 4 , wherein the second legs of the lead frames are configured to be coupled to a printed circuit board, a contact collector device or to an electronic board.

7 . The power semiconductor module arrangement of claim 6 , wherein the printed circuit board, the contact collector device or the electronic board is configured to provide electrical connections between the two or more individual semiconductor devices.

8 . The power semiconductor module arrangement of claim 1 , wherein the casting compound comprises an epoxy resin, a silicone, or a polymer.

9 . The power semiconductor module arrangement of claim 1 , wherein the molding material has an expansion coefficient between 5 and 40 ppm/K, and wherein the casting compound has an expansion coefficient between 5 and 40 ppm/K.

10 . The power semiconductor module arrangement of claim 1 , wherein the molding material has an expansion coefficient between 10 and 20 ppm/K, and wherein the casting compound has an expansion coefficient between 10 and 20 ppm/K.

11 . The power semiconductor module arrangement of claim 1 , further comprising at least one fastening element configured to attach the power semiconductor module arrangement to a heat sink.

12 . The power semiconductor module arrangement of claim 1 , wherein at least one external surface of at least one of the two or more individual semiconductor devices has an average surface roughness of at least 16.

13 . A method for producing a power semiconductor module arrangement, the method comprising:
arranging two or more individual semiconductor devices on a base layer, each semiconductor device comprising a lead frame, a semiconductor body arranged on the lead frame, and a molding material enclosing the semiconductor body and at least part of the lead frame; arranging a frame on the base layer such that the frame surrounds the two or more individual semiconductor devices;
filling a first material into a capacity formed by the base layer and the frame; and
hardening the first material to form a casting compound that at least partly fills the capacity, thereby at least partly encloses the two or more individual semiconductor devices.

14 . The method of claim 13 , further comprising:
removing the base layer after forming the casting compound.

15 . The method of claim 13 , further comprising:
removing the frame after forming the casting compound.

16 . The method of claim 13 , further comprising:
connecting the lead frames to a printed circuit board.

17 . The method of claim 13 , further comprising:
forming a layer of electrically isolating material on a bottom side of the lead frames.

18 . The method of claim 13 , further comprising:
arranging the casting compound with the two or more individual semiconductor devices enclosed therein on a heat sink.

19 . The method of claim 13 , wherein the base layer comprises a first layer and a carrier layer, wherein the two or more individual semiconductor devices are arranged on the base layer such that the first layer is arranged between the semiconductor devices and the carrier layer, and wherein hardening the first material to form the casting compound comprises hardening the first foil to alter adhesive properties of the first foil.

Assignees

• Infineon Technologies Ag

Inventors

• Hohlfeld Olaf
• Kanschat Peter

Classifications

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W42/00

  Arrangements for protection of devices (arrangements for thermal protection H10W40/00) · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W76/47 Primary

  Solid or gel fillings · CPC title

• H10W74/121

  by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation · CPC title