Methods for etching metal films using plasma processing

Patent metadata

Field	Value
Publication number	US-12057322-B2
Application number	US-201916658620-A
Country	US
Kind code	B2
Filing date	Oct 21, 2019
Priority date	Oct 21, 2019
Publication date	Aug 6, 2024
Grant date	Aug 6, 2024

Abstract

A method of plasma processing that includes maintaining a plasma processing chamber between 10° C. to 200° C., flowing oxygen and nitrogen into the plasma processing chamber, where a ratio of a flow rate of the nitrogen to a flow rate of oxygen is between about 1:5 and about 1:1, and etching a ruthenium/osmium layer by sustaining a plasma in the plasma processing chamber.

First claim

What is claimed is:

1. A method of plasma processing, the method comprising:
maintaining a plasma processing chamber between 10° C. to 200° C.;
flowing argon, oxygen and nitrogen into the plasma processing chamber without flowing a halogen-containing gas, wherein a flow rate ratio of a flow rate of the nitrogen to a flow rate of the oxygen is between about 1:5 and about 1:1;
etching a ruthenium/osmium layer by a plasma generated in the plasma processing chamber only from a gas mixture consisting of the argon, the oxygen, and the nitrogen flowing through the plasma processing chamber at the flow rate ratio; and
performing a plasma pre-treatment step to remove halogen from the plasma processing chamber before flowing the oxygen and the nitrogen.

2. The method of claim 1 , wherein the ruthenium/osmium layer comprises a layer of ruthenium.

3. The method of claim 1 , wherein etching the ruthenium/osmium layer comprises:
exposing a substrate disposed in the plasma processing chamber to the plasma, the substrate comprising the ruthenium/osmium layer, wherein the etching forms a feature.

4. The method of claim 3 , wherein the feature is a metal line disposed between the substrate and a copper metal line, wherein the metal line is narrower than the copper metal line.

5. The method of claim 3 , wherein the substrate comprises an insulating layer on which the ruthenium/osmium layer is disposed on, wherein, when forming the feature, the ruthenium/osmium layer is etched at a first rate and the insulating layer is etched at a second rate, wherein the first rate is faster than the second rate.

6. The method of claim 3 , wherein the feature is an electrode of a two terminal memory device.

7. The method of claim 3 , further comprising using the feature as an etch mask, forming an opening for a supervia extending through multiple levels of metallization.

8. The method of claim 1 , wherein a ratio of a flow rate of the argon to a flow rate of oxygen is between 0:1 and 1:5.

9. A method of plasma processing, the method comprising:
flowing argon, oxygen and nitrogen into a plasma processing chamber, wherein a flow rate ratio of a flow rate of the nitrogen to a flow rate of the oxygen is between about 1:5 and about 1:1;
sustaining a halogen-free plasma in the plasma processing chamber, the halogen-free plasma being generated only from a gas mixture consisting of argon, nitrogen, and oxygen flowing at the flow rate ratio;
exposing a substrate disposed in the plasma processing chamber to the halogen-free plasma, the halogen-free plasma etching, at a first rate, a ruthenium/osmium layer in the substrate to form a feature; and
wherein a value of the first rate at a point at a center of the substrate to a value of the first rate at a point at an edge of the substrate varies between 0.85 to 1.15, and wherein a surface roughness of the ruthenium/osmium layer after the etching varies between 0.1 nm and 1 nm, wherein the substrate comprises an insulating layer on which the ruthenium/osmium layer is disposed, wherein when forming the feature, the ruthenium/osmium layer is etched at a first rate and the insulating layer is etched at a second rate, wherein a ratio between the first rate and the second rate is between 5:1 to 200:1.

10. The method of claim 9 , wherein a line edge roughness of the ruthenium/osmium layer after the etching is between 0.5 nm and 2 nm.

11. The method of claim 9 , wherein the feature is a metal line disposed between the substrate and a copper metal line, wherein the metal line is narrower than the copper metal line.

12. The method of claim 9 , further comprising:
using the feature as a etch mask layer, forming an opening for a supervia extending through multiple levels of metallization.

Assignees

• Tokyo Electron Ltd
• IBM

Inventors

• Joy Nicholas
• Koty Devi
• Yang Qingyun
• Marchack Nathan P
• Engelmann Sebastian Ulrich

Classifications

• H10W20/0633

  using subtractive patterning of the conductive members · CPC title

• H10W20/421

  Skip vias, i.e. vias that do not connect all metallization layers that they pass through · CPC title

• H10W20/0693

  by forming self-aligned vias · CPC title

• H10W20/438

  Interconnections with multiple fill metals, e.g. having different metals in wide and narrow interconnections, or having different metals in vias and in trenches · CPC title

• H10P72/0468

  comprising a chamber adapted to a particular process · CPC title