Electronic substrates having embedded inductors

Patent metadata

Field	Value
Publication number	US-12057252-B2
Application number	US-202017029870-A
Country	US
Kind code	B2
Filing date	Sep 23, 2020
Priority date	Sep 23, 2020
Publication date	Aug 6, 2024
Grant date	Aug 6, 2024

Abstract

An electronic substrate may be fabricated by forming a base substrate and forming an inductor extending through the base substrate, wherein the inductor includes a magnetic material layer and a barrier layer, such that the barrier layer prevents the magnetic material layer from leaching into plating solutions during the fabrication of the electronic substrate. In one embodiment, the barrier material may comprise titanium. In another embodiment, the barrier layer may comprise a polymeric material. In still another embodiment, the barrier layer may comprise a nitride material layer. The inductor may further include a plating seed layer on the barrier layer and a conductive fill material abutting the plating seed layer.

First claim

What is claimed is:

1. An electronic assembly, comprising:
a base substrate having a first surface and an opposing second surface, wherein the base substrate comprises at least one opening defined by at least one sidewall extending from the first surface to the second surface; and
an inductor within the at least one opening, wherein the inductor comprises:
a magnetic material layer on the at least one sidewall of the at least one opening of the base substrate;
a barrier layer on the magnetic material layer, wherein the barrier layer comprises titanium;
a plating seed layer on the barrier layer; and
a conductive fill material abutting the plating seed layer.

2. The electronic assembly of claim 1 , wherein the magnetic material layer comprises at least one material selected from the group consisting of iron, nickel, cobalt, and rare-earth metals.

3. The electronic assembly of claim 1 , wherein the plating seed layer comprises copper.

4. The electronic assembly of claim 1 , wherein the conductive fill material comprises conductive particles dispersed in a resin.

5. The electronic assembly of claim 4 , wherein the conductive particles comprise ferrite.

6. An integrated circuit package, comprising:
at least one integrated circuit device; and
an electronic substrate to which the at least one integrated circuit device is electrically attached,
wherein the electronic substrate comprises:
a base substrate having a first surface and an opposing second surface, wherein the base substrate comprises at least one opening defined by at least one sidewall extending from the first surface to the second surface; and
an inductor within the at least one opening, wherein the inductor comprises:
a magnetic material layer on the at least one sidewall of the at least one opening of the base substrate;
a barrier layer on the magnetic material layer, wherein the barrier layer comprises titanium;
a plating seed layer on the barrier layer; and
a conductive fill material abutting the plating seed layer.

7. The integrated circuit package of claim 6 , wherein the magnetic material layer comprises at least one material selected from the group consisting of iron, nickel, cobalt, and rare-earth metals.

8. The integrated circuit package of claim 6 , wherein the plating seed layer comprises copper.

9. The integrated circuit package of claim 6 , wherein the conductive fill material comprises conductive particles dispersed in a resin.

10. The integrated circuit package of claim 9 , wherein the conductive particles comprise ferrite.

11. The integrated circuit package of claim 6 , further comprising an electronic board, wherein the electronic substrate is electrically attached to the electronic board.

Assignees

• Intel Corp

Inventors

• Duong Benjamin
• Garelick Michael
• Grujicic Darko
• Ibrahim Tarek
• Marin Brandon C
• Vadlamani Sai
• Wall Marcel

Classifications

• H10W90/701

  characterised by the relative positions of pads or connectors relative to package parts · CPC title

• H10W70/635

  Through-vias · CPC title

• H10W44/501

  Inductive arrangements (H10W44/20 takes precedence) · CPC title

• H10W70/685

  comprising multiple insulating layers · CPC title

• H01F41/32

  for applying conductive, insulating or magnetic material on a magnetic film {, specially adapted for a thin magnetic film} · CPC title