Source/drain structure for semiconductor device

Patent metadata

Field	Value
Publication number	US-12040384-B2
Application number	US-202117459469-A
Country	US
Kind code	B2
Filing date	Aug 27, 2021
Priority date	Aug 27, 2021
Publication date	Jul 16, 2024
Grant date	Jul 16, 2024

Abstract

The present disclosure describes a semiconductor structure and a method for forming the same. The method can include forming a recess structure in a substrate and forming a first semiconductor layer over the recess structure. The process of forming the first semiconductor layer can include doping first and second portions of the first semiconductor layer with a first n-type dopant having first and second doping concentrations, respectively. The second doping concentration can be greater than the first doping concentration. The method can further include forming a second semiconductor layer over the second portion of the first semiconductor layer. The process of forming the second semiconductor layer can include doping the second semiconductor layer with a second n-type dopant.

First claim

What is claimed is:

1. A method, comprising:
forming a recess structure in a substrate;
forming, over the recess structure, a first semiconductor layer that comprises doping first and second portions of the first semiconductor layer with a first n-type dopant to form a first horizontal doping profile in the first portion and a second horizontal doping profile in the second portion, wherein the second horizontal doping profile is greater than the first horizontal doping profile, and wherein the second horizontal doping profile comprises a first doping peak; and
forming, over the second portion of the first semiconductor layer, a second semiconductor layer that comprises doping the second semiconductor layer with a second n-type dopant to form a third horizontal doping profile comprising a second doping peak, wherein a first maxima of the first doping peak is greater than a second maxima of the second doping peak.

2. The method of claim 1 , wherein doping the first and second portions of the first semiconductor layer comprises:
performing a first epitaxial growth process to grow the first portion of the first semiconductor layer over the recess structure at a first growth pressure of a first precursor gas of the first n-type dopant; and
performing a second epitaxial growth process to grow the second portion of the first semiconductor layer over the first portion of the first semiconductor layer at a second growth pressure of the first precursor gas of the first n-type dopant, wherein the second growth pressure is greater than the first growth pressure.

3. The method of claim 2 , wherein performing the first and second epitaxial growth processes comprises performing the first and second epitaxial growth processes over first and second time durations, respectively, wherein the second time duration is less than the first time duration.

4. The method of claim 1 , wherein doping the first and second portions of the first semiconductor layer comprises:
flowing a dopant precursor gas that includes the first n-type dopant at a first flow rate to grow the first portion of the first semiconductor layer over the recess structure, wherein the first, flow rate is greater than zero; and
flowing the dopant precursor gas at a second flow rate to grow the second portion of the first semiconductor layer over the first portion of the first semiconductor layer, wherein the second flow rate is greater than the first flow rate.

5. The method of claim 4 , wherein doping the first and second portions of the first semiconductor layer further comprises:
flowing the dopant precursor gas to grow the first portion of the first semiconductor layer over a first time duration; and
flowing the dopant precursor gas to grow the second portion of the first semiconductor layer over a second time duration less than the first time duration.

6. The method of claim 1 , wherein doping the first and second portions of the first semiconductor layer comprises:
performing a first epitaxial growth process to grow the first portion of the first semiconductor layer over the recess structure at a first growth temperature; and
performing a second epitaxial growth process to grow the second portion of the first semiconductor layer over the first portion of the first semiconductor layer at a second growth temperature greater than the first growth temperature.

7. The method of claim 6 , wherein performing the first and second epitaxial growth processes comprises performing the first and second epitaxial growth processes over first and second time durations, respectively, wherein the second time duration is less than the first time duration.

8. A method, comprising:
forming a fin structure over a substrate;
forming a gate structure over the fin structure;
forming a recess structure in the fin structure and adjacent to the gate structure;
doping, over the recess structure, a first semiconductor layer with a first n-type dopant to form a first doping profile along a direction parallel to the substrate;
doping, over the first semiconductor layer, a second semiconductor layer with the first n-type dopant to form a second doping profile along the direction, wherein the second doping profile is greater than the first doping profile, and wherein the second doping profile comprises a first doping peak; and
doping, over the second semiconductor layer, a third semiconductor layer with a second n-type dopant to form a third doping profile along the direction, wherein the third doping profile comprises a second doping peak lower than the first doping peak.

9. The method of claim 8 , wherein doping the first, second, and third semiconductor layers comprises performing first, second, and third epitaxial growth processes at a first growth pressure of a first precursor gas of the first n-type dopant, a second growth pressure of the first precursor gas of the first n-type dopant, and a third growth pressure of a second precursor gas of the second n-type dopant, respectively, wherein the first and third growth pressures are less than the second growth pressure.

10. The method of claim 9 , wherein performing the first and second epitaxial growth processes comprises performing the first and second epitaxial growth processes over first and second time durations, respectively, wherein the second time duration is less than the first time duration.

11. The method of claim 8 , wherein doping the first and second semiconductor layers comprises:
flowing a dopant precursor gas that includes the first n-type dopant at a first flow rate to grow the first semiconductor layer, wherein the first flow rate is greater than zero; and
flowing the dopant precursor gas at a second flow rate to grow the second semiconductor layer, wherein the second flow rate is greater than the first flow rate.

12. The method of claim 11 , wherein doping the first and second semiconductor layers further comprises:
flowing the dopant precursor gas to grow the first semiconductor layer over a first time duration; and
flowing the dopant precursor gas to grow the second semiconductor layer over a second time duration less than the first time duration.

13. The method of claim 8 , wherein doping the first, second, and third semiconductor layers comprises performing first, second, and third epitaxial growth processes at first, second, and third growth temperatures, respectively, wherein the first and third growth temperatures are less than the second growth temperature.

14. The method of claim 13 , wherein performing the first and second epitaxial growth processes comprises performing the first and second epitaxial growth processes over first and second time durations, respectively, wherein the second time duration is less than the first time duration.

15. A semiconductor structure, comprising:
a substrate;
a fin structure over the substrate;
a gate structure over a first portion of the fin structure; and
a source/drain (S/D) region formed in a second portion of the fin structure, wherein the S/D region comprises:
a first epitaxial layer doped with a first n-type dopant and in contact with the fin structure, wherein a first doping profile of the first n-type dopant and along a horizontal direction comprises a first doping peak in the first epitaxial layer, and wherein the horizontal direction is parallel to a top surface of the substrate; and
a second epitaxial layer formed over the first epitaxial layer and doped with a second n-type dopant having a second doping profile along the horizontal direction, wherein the second doping profile comprises a second doping peak in the second epitaxial layer, and where

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chen Lung

Classifications

• H10P14/6349

  Deposition of epitaxial materials · CPC title

• H10D84/0158

  the components including FinFETs · CPC title

• H10D84/038

  using silicon technology, e.g. SiGe · CPC title

• H10D62/151 Primary

  of IGFETs  (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713) · CPC title

• H10D30/6211

  having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates · CPC title