Wafer processing apparatus

Patent metadata

Field	Value
Publication number	US-12014904-B2
Application number	US-202117370766-A
Country	US
Kind code	B2
Filing date	Jul 8, 2021
Priority date	Dec 1, 2020
Publication date	Jun 18, 2024
Grant date	Jun 18, 2024

Abstract

A wafer processing apparatus is provided. The wafer processing apparatus includes a chamber body defining a plasma region configured that plasma is generated in the plasma region, a wafer support arranged in the chamber body and configured to support a wafer, first and second electrodes arranged between the wafer support and the plasma region and having apertures configured to guide a path of ions of the plasma, a first power source configured to apply, to the first electrode, a voltage that is higher than a voltage applied to the second electrode, and a second power source configured to apply, to the wafer support, a voltage that is higher than the voltage applied to the second electrode.

First claim

What is claimed is:

1. A wafer processing apparatus comprising:
a chamber body defining a plasma region configured that plasma is generated in the plasma region;
a wafer support arranged in the chamber body and configured to support a wafer;
first and second electrodes arranged between the wafer support and the plasma region and each having apertures configured to guide a path of ions of the plasma, wherein the first and second electrodes are flat and parallel to each other and the apertures of the first electrode are misaligned with the apertures of the second electrode;
a first power source configured to apply, to the first electrode, a voltage that is higher than a voltage applied to the second electrode; and
a second power source configured to apply, to the wafer support, a voltage that is higher than the voltage applied to the second electrode, wherein the wafer processing apparatus is configured that the first power source accelerates the ions to generate a plurality of reactive ion beams, each of the plurality of reactive ion beams traveling through a respective one of the apertures,
wherein a first aperture in the first electrode and a second aperture in the second electrode form a first pair of apertures, wherein the first aperture is disposed directly above the second aperture, and a third aperture in the first electrode and a fourth aperture in the second electrode form a second pair of apertures, wherein the third aperture is disposed directly above the fourth aperture, and
wherein a central direction of travel of a reactive ion beam traveling through the first pair of apertures is different from a central direction of travel of a reactive ion beam simultaneously traveling through the second pair of apertures such that the reactive ion beam traveling through the first pair of apertures intersects the reactive ion beam traveling through the second pair of apertures after passing through the first and second electrodes.

2. The wafer processing apparatus of claim 1 , wherein the wafer processing apparatus is configured that the second power source controls a path of each of the plurality of reactive ion beams.

3. The wafer processing apparatus of claim 1 , wherein the wafer processing apparatus is configured that the second power source makes a path of each of the plurality of reactive ion beams not parallel with an extending direction of the apertures.

4. The wafer processing apparatus of claim 1 , wherein the wafer processing apparatus is configured that a voltage applied to the first electrode by the first power source is higher than a voltage applied to the wafer support by the second power source.

5. The wafer processing apparatus of claim 1 , further comprising:
a third power source configured to apply, to the second electrode, a third voltage that is different from a reference potential applied to the chamber body.

6. The wafer processing apparatus of claim 1 , wherein the second power source is further configured to apply, to the wafer support, a voltage that is lower than a voltage applied to the second electrode.

7. The wafer processing apparatus of claim 1 , wherein the wafer processing apparatus includes any one of a capacitively coupled plasma (CCP) generator, an inductively coupled plasma (ICP) generator, and a microwave plasma generator.

8. The wafer processing apparatus of claim 1 , further comprising:
a plasma generator configured to apply a magnetic or electric field to the plasma region; and
a radio frequency (RF) power source configured to supply RF power to the plasma generator.

9. The wafer processing apparatus of claim 1 , wherein the first and second electrodes are configured to move in a direction parallel to an upper surface of the wafer.

10. A wafer processing apparatus configured to perform a wafer etching process using a reactive ion beam, the wafer processing apparatus comprising:
a chamber body defining a chamber, the chamber body configured that a wafer is arranged in the chamber, the chamber body defining a plasma region configured that plasma is generated in the plasma region;
first and second electrodes arranged between the plasma region and a wafer support configured to receive the wafer, each of the first and second electrodes having apertures configured to guide a path of ions of the plasma, wherein the first and second electrodes are flat and parallel to each other and the apertures of the first electrode are misaligned with the apertures of the second electrode;
a radio frequency (RF) power source configured to provide RF power to generate the plasma;
a first power source configured to apply a first voltage to the first electrode to generate the reactive ion beam by accelerating positive ions of the plasma; and
a second power source configured to apply a second voltage to the wafer to control a path of the reactive ion beam,
wherein the wafer processing apparatus is configured that the first power source accelerates the ions to generate a plurality of reactive ion beams, each of the plurality of reactive ion beams traveling through a respective one of the apertures,
wherein a first aperture in the first electrode and a second aperture in the second electrode form a first pair of apertures, wherein the first aperture is disposed directly above the second aperture, and a third aperture in the first electrode and a fourth aperture in the second electrode form a second pair of apertures, wherein the third aperture is disposed directly above the fourth aperture, and
wherein a central direction of travel of a reactive ion beam traveling through the first pair of apertures is different from a central direction of travel of a reactive ion beam simultaneously traveling through the second pair of apertures such that the reactive ion beam traveling through the first pair of apertures intersects the reactive ion beam traveling through the second pair of apertures after passing through the first and second electrodes.

11. The wafer processing apparatus of claim 10 , wherein the second voltage is less than the first voltage.

12. The wafer processing apparatus of claim 10 , wherein the wafer processing apparatus is configured that the second power source applies, to the wafer, the second voltage that is higher than a voltage applied to the second electrode to control a path of each of the plurality of reactive ion beams so that the reactive ion beam is incident on the wafer at an angle greater than an angle of a central axis of the apertures with respect to a first direction perpendicular to an upper surface of the wafer.

13. The wafer processing apparatus of claim 10 , wherein the wafer processing apparatus is configured that the second power source applies, to the wafer, the second voltage that is lower than a voltage applied to the second electrode to control a path of each of the plurality of reactive ion beams so that the reactive ion beam is incident on the wafer at an angle less than an angle of a central axis of the apertures with respect to a first direction perpendicular to an upper surface of the wafer.

14. The wafer processing apparatus of claim 10 , wherein the wafer processing apparatus is configured that a reference potential is applied to the chamber body and the second electrode.

15. The wafer processing apparatus of claim 10 , further comprising:
a third power source configured to apply, to the second electrode, a third voltage that is different from a reference potential applied to the chamber body.

16. A wafer processing apparatus configured to make a reactive ion beam be incident on a wafer at first to third angles with respect to

Assignees

• Samsung Electronics Co Ltd

Inventors

• Park Jongchul
• Ra Hyonwook

Classifications

• H10P50/267

  using plasmas · CPC title

• H01J37/32422

  Arrangement for selecting ions or species in the plasma · CPC title

• H01J2237/2007

  Holding mechanisms · CPC title

• H01J37/32082

  Radio frequency generated discharge (H01J37/32357, H01J37/32366, H01J37/32394 and H01J37/32403 take precedence) · CPC title

• H01J37/32715 Primary

  Workpiece holder · CPC title