Method for forming a fine pattern

Patent metadata

Field	Value
Publication number	US-10600653-B2
Application number	US-201916263759-A
Country	US
Kind code	B2
Filing date	Jan 31, 2019
Priority date	Feb 23, 2018
Publication date	Mar 24, 2020
Grant date	Mar 24, 2020

Abstract

A method for forming a fine pattern includes forming line patterns and a connection pattern on a semiconductor substrate, the line patterns extending in a first direction and spaced apart from each other in a second direction intersecting the first direction, and the connection pattern connecting portions of the line patterns adjacent to each other in the second direction, and performing an ion beam etching process on the connection pattern. The ion beam etching process provides an ion beam in an incident direction parallel to a plane defined by the first direction and a third direction perpendicular to a top surface of the semiconductor substrate, and the incident direction of the ion beam is not perpendicular to the top surface of the semiconductor substrate.

First claim

What is claimed is:

1. A method for forming a fine pattern, the method comprising:
forming line patterns and a connection pattern on a semiconductor substrate, the line patterns extending in a first direction and spaced apart from each other in a second direction intersecting the first direction, and the connection pattern connecting portions of the line patterns adjacent to each other in the second direction; and
performing an ion beam etching process on the connection pattern,
wherein the ion beam etching process provides an ion beam in an incident direction parallel to a plane defined by the first direction and a third direction perpendicular to a top surface of the semiconductor substrate, and the incident direction of the ion beam is not perpendicular to the top surface of the semiconductor substrate.

2. The method of claim 1 , wherein the ion beam etching process irradiates the ion beam toward a sidewall of the connection pattern.

3. The method of claim 1 , wherein one of the line patterns has a recessed portion which is recessed from a top surface of the one line pattern, and
wherein an incidence angle of the ion beam is adjusted depending on a depth of the recessed portion in the ion beam etching process, and the incidence angle is defined as an angle between the incident direction and the top surface of the semiconductor substrate.

4. The method of claim 1 , wherein a height of the connection pattern is less than heights of the line patterns on the semiconductor substrate.

5. The method of claim 1 , wherein a height of the connection pattern is substantially equal to heights of the line patterns.

6. The method of claim 1 , further comprising:
forming a lower layer on the semiconductor substrate, wherein the line patterns and the connection pattern are formed on the lower layer,
wherein the performing of the ion beam etching process comprises: removing the connection pattern to expose the lower layer between the line patterns adjacent to each other in the second direction.

7. The method of claim 1 , further comprising:
sequentially forming a lower layer and a mask layer on the semiconductor substrate; and
forming a photoresist pattern on the mask layer, wherein the photoresist pattern comprises: line portions extending in the first direction; and a residual portion locally remaining between the line portions adjacent to each other in the second direction,
wherein the forming of the line patterns and the connection pattern comprises: anisotropically etching the mask layer using the photoresist pattern as an etch mask.

8. The method of claim 7 , wherein the forming of the photoresist pattern comprises:
forming a photoresist layer on the mask layer;
performing an exposure process irradiating extreme ultraviolet (EUV) to the photoresist layer; and
developing the exposed photoresist layer.

9. The method of claim 7 , wherein the mask layer is a spin-on-hardmask (SOH) layer, a spin-on-carbon (SOC) layer, or an amorphous carbon layer (ACL).

10. The method of claim 1 , wherein the line patterns and the connection pattern are formed of a photoresist.

11. The method of claim 1 , wherein the performing of the ion beam etching process comprises: reducing a width of the connection pattern in the first direction.

12. The method of claim 11 , further comprising:
forming conductive patterns in openings defined by the line patterns and the connection pattern, respectively, after the performing of the ion beam etching process,
wherein the conductive patterns extend in the first direction; and the conductive patterns are spaced apart from each other in the second direction by the line patterns and are spaced apart from each other in the first direction by the connection pattern.

13. The method of claim 11 , wherein the line patterns and the connection pattern are formed of an insulating material.

14. A method for forming a fine pattern, the method comprising:
sequentially forming a lower layer and an organic mask layer on a semiconductor substrate;
forming a hard mask pattern on the organic mask layer, the hard mask pattern comprising: first line portions extending in parallel in a first direction; and a first connection portion between the first line portions adjacent to each other;
anisotropically etching the organic mask layer using the hard mask pattern as an etch mask to form an organic mask pattern which comprises: second line portions under the first line portions of the hard mask pattern; and a second connection portion under the first connection portion of the hard mask pattern; and
selectively ion-beam-etching the second connection portion of the organic mask pattern,
wherein the ion-beam-etching of the second connection portion comprises: irradiating an ion beam in an incident direction which is parallel to a plane defined by the first direction and a second direction perpendicular to a top surface of the semiconductor substrate, and
wherein the incident direction of the ion beam is not perpendicular to the top surface of the semiconductor substrate.

15. The method of claim 14 , wherein the ion-beam-etching of the second connection portion comprises: irradiating the ion beam toward a sidewall of the second connection portion of the organic mask pattern.

16. The method of claim 14 , wherein the ion-beam-etching of the second connection portion comprises: removing the second connection portion of the organic mask pattern to expose a bottom surface of the first connection portion of the hard mask pattern.

17. The method of claim 14 , wherein heights of the second line portions are substantially equal to a height of the second connection portion in the organic mask pattern.

18. The method of claim 14 , further comprising:
anisotropically etching the lower layer using the second line portions of the organic mask pattern as etch masks to form lower patterns, after the ion-beam-etching of the second connection portion,
wherein the lower patterns extend in the first direction and are laterally separated from each other.

19. The method of claim 14 , further comprising:
sequentially forming a hard mask layer and a photoresist layer on the organic mask layer, before the forming of the hard mask pattern; and
performing exposure and development processes on the photoresist layer to form a photoresist pattern which comprises: line portions extending in parallel in the first direction; and a residual portion between the line portions adjacent to each other,
wherein the forming of the hard mask pattern comprises: anisotropically etching the hard mask layer using the photoresist pattern as an etch mask.

20. The method of claim 19 , wherein a height of the residual portion is less than heights of the line portions in the photoresist pattern.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Bai Keunhee
• Park Jongchul
• Kim Seungjun
• Park Seungju
• Park Young-Ju
• Lee Hak-Sun

Classifications

• H01L21/3065 Primary

  Electricity · mapped topic

• H01L21/3086

  Electricity · mapped topic

• H01L21/32139

  Electricity · mapped topic

• H01L21/32136

  Electricity · mapped topic

• H10P50/695

  characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title