High density organic bridge device and method

Patent metadata

Field	Value
Publication number	US-12002762-B2
Application number	US-202016889190-A
Country	US
Kind code	B2
Filing date	Jun 1, 2020
Priority date	Dec 20, 2012
Publication date	Jun 4, 2024
Grant date	Jun 4, 2024

Abstract

Embodiments that allow multi-chip interconnect using organic bridges are described. In some embodiments an organic package substrate has an embedded organic bridge. The organic bridge can have interconnect structures that allow attachment of die to be interconnected by the organic bridge. In some embodiments, the organic bridge comprises a metal routing layer, a metal pad layer and interleaved organic polymer dielectric layers but without a substrate layer. Embodiments having only a few layers may be embedded into the top layer or top few layers of the organic package substrate. Methods of manufacture are also described.

First claim

What is claimed is:

1. A microelectronic package, comprising:
a first die;
a second die;
an organic polymer interconnect bridge electrically coupled between an edge of the first die and an edge of the second die, wherein an organic polymer in the organic polymer interconnect bridge electrically separates two or more conductive paths that directly connect the first die to the second die.

2. The microelectronic package of claim 1 , wherein the organic polymer interconnect bridge includes one or more spin-on-glass dielectric layers.

3. The microelectronic package of claim 1 , wherein the organic polymer interconnect bridge includes multiple conductor layers.

4. The microelectronic package of claim 1 , wherein a wire width in the organic polymer interconnect bridge is 3 μm or less.

5. The microelectronic package of claim 1 , wherein a wire width in the organic polymer interconnect bridge includes a region of 3 μm or less width and a region of 10 μm or less width.

6. The microelectronic package of claim 1 , wherein the organic polymer interconnect bridge is 15 μm or less in thickness.

7. A microelectronic package, comprising:
a first die coupled to a substrate;
a second die coupled to the substrate adjacent to the first die;
an organic polymer interconnect bridge located beneath the first and second die, and above the substrate, wherein an organic polymer in the organic polymer interconnect bridge electrically separates two or more conductive paths that directly connect the first die to the second die, the organic polymer bridge electrically coupled between an edge of the first die and an edge of the second die.

8. The microelectronic package of claim 7 , wherein the organic polymer interconnect bridge is incorporated into a solder mask cavity on a surface layer of the substrate.

9. The microelectronic package of claim 7 , wherein the organic polymer interconnect bridge includes one or more spin-on-glass dielectric layers.

10. The microelectronic package of claim 7 , wherein the organic polymer interconnect bridge includes multiple conductor layers.

11. The microelectronic package of claim 7 , wherein a wire width in the organic polymer interconnect bridge is 3 μm or less.

12. The microelectronic package of claim 7 , wherein a wire width in the organic polymer interconnect bridge includes a region of 3 μm or less width and a region of 10 μm or less width.

13. A microelectronic package, comprising:
a first die coupled to a substrate;
a second die coupled to the substrate adjacent to the first die;
an organic polymer interconnect bridge at least partially embedded in the substrate, wherein an organic polymer in the organic polymer interconnect bridge electrically separates two or more conductive paths that directly connect the first die to the second die, the organic polymer bridge electrically coupled between an edge of the first die and an edge of the second die.

14. The microelectronic package of claim 13 , further including a bonding layer between the organic polymer interconnect bridge and the substrate.

15. The microelectronic package of claim 13 , wherein the organic polymer interconnect bridge includes one or more spin-on-glass dielectric layers.

16. The microelectronic package of claim 13 , wherein the organic polymer interconnect bridge includes multiple conductor layers.

17. The microelectronic package of claim 13 , wherein a wire width in the organic polymer interconnect bridge is 3 μm or less.

18. The microelectronic package of claim 13 , wherein a wire width in the organic polymer interconnect bridge includes a region of 3 μm or less width and a region of 10 μm or less width.

19. The microelectronic package of claim 13 , wherein the organic polymer interconnect bridge is 15 μm or less in thickness.

Assignees

• Intel Corp

Inventors

• Roy Mihir K
• Lotz Stefanie M
• Jen Wei-Lun Kane

Classifications

• H10W70/618

  the bridge chips being embedded in the package substrates, interposers or redistribution layers · CPC title

• H10W70/63

  Vias, e.g. via plugs · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W72/07232

  Compression bonding, e.g. thermocompression bonding · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title